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riscv-gcc-1
Commit 3276910d by Richard Kenner Committed by Richard Kenner
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sparc.c (sparc_override_options): Do support different pointer and architecture size. 

	* config/sparc/sparc.c (sparc_override_options): Do support different
	pointer and architecture size.
	* config/sparc/sparc.h (MIN_UNITS_PER_WORD): Always 4.
	(POINTERS_EXTEND_UNSIGNED): Define.
	(Pmode): Test TARGET_ARCH64, not TARGET_PTR64.
	(FUNCTION_MODE): Define to be Pmode.
	* config/sparc/sparc.md (64-bit call patterns): FUNCTION_MODE now DI.

From-SVN: r38608
parent d1608933
Showing with 34 additions and 42 deletions
gcc/ChangeLog
Mon Jan 1 21:28:29 2001 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
* config/sparc/sparc.c (sparc_override_options): Do support different
pointer and architecture size.
* config/sparc/sparc.h (MIN_UNITS_PER_WORD): Always 4.
(POINTERS_EXTEND_UNSIGNED): Define.
(Pmode): Test TARGET_ARCH64, not TARGET_PTR64.
(FUNCTION_MODE): Define to be Pmode.
* config/sparc/sparc.md (64-bit call patterns): FUNCTION_MODE now DI.
* function.c (expand_function_end): Properly handle DECL_RESULT
and copy when ptr_mode != Pmode.
* expmed.c (make_tree): Convert X from Pmode to ptr_mode, if needed.
......
gcc/config/sparc/sparc.c
/* Subroutines for insn-output.c for Sun SPARC.
Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
1999, 2000 Free Software Foundation, Inc.
1999, 2000, 2001 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@cygnus.com)
64 bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
at Cygnus Support.
......@@ -241,7 +241,7 @@ sparc_override_options ()
{ "ultrasparc", PROCESSOR_ULTRASPARC, MASK_ISA, MASK_V9
/* Although insns using %y are deprecated, it is a clear win on current
ultrasparcs. */
|MASK_DEPRECATED_V8_INSNS },
|MASK_DEPRECATED_V8_INSNS},
{ 0, 0, 0, 0 }
};
struct cpu_table *cpu;
......@@ -251,23 +251,10 @@ sparc_override_options ()
#ifndef SPARC_BI_ARCH
/* Check for unsupported architecture size. */
if (! TARGET_64BIT != DEFAULT_ARCH32_P)
{
error ("%s is not supported by this configuration",
DEFAULT_ARCH32_P ? "-m64" : "-m32");
}
error ("%s is not supported by this configuration",
DEFAULT_ARCH32_P ? "-m64" : "-m32");
#endif
/* At the moment we don't allow different pointer size and architecture */
if (! TARGET_64BIT != ! TARGET_PTR64)
{
error ("-mptr%d not allowed on -m%d",
TARGET_PTR64 ? 64 : 32, TARGET_64BIT ? 64 : 32);
if (TARGET_64BIT)
target_flags |= MASK_PTR64;
else
target_flags &= ~MASK_PTR64;
}
/* We force all 64bit archs to use 128 bit long double */
if (TARGET_64BIT && ! TARGET_LONG_DOUBLE_128)
{
......
gcc/config/sparc/sparc.h
......@@ -765,11 +765,7 @@ extern struct sparc_cpu_select sparc_select[];
/* Width of a word, in units (bytes). */
#define UNITS_PER_WORD (TARGET_ARCH64 ? 8 : 4)
#ifdef IN_LIBGCC2
#define MIN_UNITS_PER_WORD UNITS_PER_WORD
#else
#define MIN_UNITS_PER_WORD 4
#endif
/* Now define the sizes of the C data types. */
......@@ -780,7 +776,7 @@ extern struct sparc_cpu_select sparc_select[];
#define FLOAT_TYPE_SIZE 32
#define DOUBLE_TYPE_SIZE 64
#if defined (SPARC_BI_ARCH)
#ifdef SPARC_BI_ARCH
#define MAX_LONG_TYPE_SIZE 64
#endif
......@@ -796,6 +792,11 @@ extern struct sparc_cpu_select sparc_select[];
See also the macro `Pmode' defined below. */
#define POINTER_SIZE (TARGET_PTR64 ? 64 : 32)
/* If we have to extend pointers (only when TARGET_ARCH64 and not
TARGET_PTR64), we want to do it unsigned. This macro does nothing
if ptr_mode and Pmode are the same. */
#define POINTERS_EXTEND_UNSIGNED 1
/* A macro to update MODE and UNSIGNEDP when an object whose type
is TYPE and which has the specified mode and signedness is to be
stored in a register. This macro is only called when TYPE is a
......@@ -804,9 +805,7 @@ extern struct sparc_cpu_select sparc_select[];
if (TARGET_ARCH64 \
&& GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
{ \
(MODE) = DImode; \
}
(MODE) = DImode;
/* Define this macro if the promotion described by PROMOTE_MODE
should also be done for outgoing function arguments. */
......@@ -2697,7 +2696,7 @@ do { \
/* Specify the machine mode that pointers have.
After generation of rtl, the compiler makes no further distinction
between pointers and any other objects of this machine mode. */
#define Pmode (TARGET_PTR64 ? DImode : SImode)
#define Pmode (TARGET_ARCH64 ? DImode : SImode)
/* Generate calls to memcpy, memcmp and memset. */
#define TARGET_MEM_FUNCTIONS
......@@ -2735,10 +2734,8 @@ do { \
code knows how to reverse it correctly we keep the old definition. */
#define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode && (MODE) != CCFPmode)
/* A function address in a call instruction
is a byte address (for indexing purposes)
so give the MEM rtx a byte's mode. */
#define FUNCTION_MODE SImode
/* A function address in a call instruction for indexing purposes. */
#define FUNCTION_MODE Pmode
/* Define this if addresses of constant functions
shouldn't be put through pseudo regs where they can be cse'd.
......
gcc/config/sparc/sparc.md
;;- Machine description for SPARC chip for GNU C compiler
;- Machine description for SPARC chip for GNU C compiler
;; Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
;; 1999, 2000 Free Software Foundation, Inc.
;; 1999, 2000, 2001 Free Software Foundation, Inc.
;; Contributed by Michael Tiemann (tiemann@cygnus.com)
;; 64 bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
;; at Cygnus Support.
......@@ -149,7 +149,7 @@
[(eq_attr "in_call_delay" "true") (nil) (nil)])
(define_attr "eligible_for_sibcall_delay" "false,true"
(symbol_ref "eligible_for_sibcall_delay(insn)"))
(symbol_ref "eligible_for_sibcall_delay (insn)"))
(define_delay (eq_attr "type" "sibcall")
[(eq_attr "eligible_for_sibcall_delay" "true") (nil) (nil)])
......@@ -158,7 +158,7 @@
(const (symbol_ref "current_function_uses_only_leaf_regs")))
(define_attr "eligible_for_return_delay" "false,true"
(symbol_ref "eligible_for_return_delay(insn)"))
(symbol_ref "eligible_for_return_delay (insn)"))
(define_attr "in_return_delay" "false,true"
(if_then_else (and (and (and (eq_attr "type" "move,load,sload,store,binary,ialu")
......@@ -8598,7 +8598,7 @@
[(set_attr "type" "call")])
(define_insn "*call_address_sp64"
[(call (mem:SI (match_operand:DI 0 "address_operand" "p"))
[(call (mem:DI (match_operand:DI 0 "address_operand" "p"))
(match_operand 1 "" ""))
(clobber (reg:DI 15))]
;;- Do not use operand 1 for most machines.
......@@ -8607,7 +8607,7 @@
[(set_attr "type" "call")])
(define_insn "*call_symbolic_sp64"
[(call (mem:SI (match_operand:DI 0 "symbolic_operand" "s"))
[(call (mem:DI (match_operand:DI 0 "symbolic_operand" "s"))
(match_operand 1 "" ""))
(clobber (reg:DI 15))]
;;- Do not use operand 1 for most machines.
......@@ -8666,7 +8666,7 @@
;; Note that this expression is not used for generating RTL.
;; All the RTL is generated explicitly below.
[(set (match_operand 0 "register_operand" "=rf")
(call (match_operand:SI 1 "" "")
(call (match_operand 1 "" "")
(match_operand 4 "" "")))]
;; operand 2 is stack_size_rtx
;; operand 3 is next_arg_register
......@@ -8722,7 +8722,7 @@
(define_insn "*call_value_address_sp64"
[(set (match_operand 0 "" "")
(call (mem:SI (match_operand:DI 1 "address_operand" "p"))
(call (mem:DI (match_operand:DI 1 "address_operand" "p"))
(match_operand 2 "" "")))
(clobber (reg:DI 15))]
;;- Do not use operand 2 for most machines.
......@@ -8732,7 +8732,7 @@
(define_insn "*call_value_symbolic_sp64"
[(set (match_operand 0 "" "")
(call (mem:SI (match_operand:DI 1 "symbolic_operand" "s"))
(call (mem:DI (match_operand:DI 1 "symbolic_operand" "s"))
(match_operand 2 "" "")))
(clobber (reg:DI 15))]
;;- Do not use operand 2 for most machines.
......@@ -8785,7 +8785,7 @@
[(set_attr "type" "sibcall")])
(define_insn "*sibcall_symbolic_sp64"
[(call (mem:SI (match_operand:DI 0 "symbolic_operand" "s"))
[(call (mem:DI (match_operand:DI 0 "symbolic_operand" "s"))
(match_operand 1 "" ""))
(return)]
"TARGET_ARCH64"
......@@ -8794,7 +8794,7 @@
(define_expand "sibcall_value"
[(parallel [(set (match_operand 0 "register_operand" "=rf")
(call (match_operand:SI 1 "" "") (const_int 0)))
(call (match_operand 1 "" "") (const_int 0)))
(return)])]
""
"")
......@@ -8810,7 +8810,7 @@
(define_insn "*sibcall_value_symbolic_sp64"
[(set (match_operand 0 "" "")
(call (mem:SI (match_operand:DI 1 "symbolic_operand" "s"))
(call (mem:DI (match_operand:DI 1 "symbolic_operand" "s"))
(match_operand 2 "" "")))
(return)]
"TARGET_ARCH64"
......
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