Commit 31e962f2 by Richard Earnshaw Committed by Richard Earnshaw

x86 - add speculation_barrier pattern

This patch adds a speculation barrier for x86, based on my
understanding of the required mitigation for that CPU, which is to use
an lfence instruction.

This patch needs some review by an x86 expert and if adjustments are
needed, I'd appreciate it if they could be picked up by the port
maintainer.  This is supposed to serve as an example of how to deploy
the new __builtin_speculation_safe_value() intrinsic on this
architecture.

	* config/i386/i386.md (unspecv): Add UNSPECV_SPECULATION_BARRIER.
	(speculation_barrier): New insn.

From-SVN: r263196
parent 71f10c42
2018-08-01 Richard Earnshaw <rearnsha@arm.com>
* config/i386/i386.md (unspecv): Add UNSPECV_SPECULATION_BARRIER.
(speculation_barrier): New insn.
2018-08-01 Richard Biener <rguenther@suse.de> 2018-08-01 Richard Biener <rguenther@suse.de>
PR bootstrap/86724 PR bootstrap/86724
......
...@@ -301,6 +301,9 @@ ...@@ -301,6 +301,9 @@
;; For CLDEMOTE support ;; For CLDEMOTE support
UNSPECV_CLDEMOTE UNSPECV_CLDEMOTE
;; For Speculation Barrier support
UNSPECV_SPECULATION_BARRIER
]) ])
;; Constants to represent rounding modes in the ROUND instruction ;; Constants to represent rounding modes in the ROUND instruction
...@@ -20979,6 +20982,13 @@ ...@@ -20979,6 +20982,13 @@
[(set_attr "type" "other") [(set_attr "type" "other")
(set_attr "memory" "unknown")]) (set_attr "memory" "unknown")])
(define_insn "speculation_barrier"
[(unspec_volatile [(const_int 0)] UNSPECV_SPECULATION_BARRIER)]
""
"lfence"
[(set_attr "type" "other")
(set_attr "length" "3")])
(include "mmx.md") (include "mmx.md")
(include "sse.md") (include "sse.md")
(include "sync.md") (include "sync.md")
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