MIPS: Fix register mode checking for n64 in pr68273.c.

gcc/testsuite/

	* gcc.target/mips/pr68273.c (dg-final): Match SImode registers only for
	ilp32 targets and match DImode registers for lp64 targets.

From-SVN: r245874

gcc/testsuite/ChangeLog

+2017-03-03  Toma Tabacu  <toma.tabacu@imgtec.com>
+
+	* gcc.target/mips/pr68273.c (dg-final): Match SImode registers only for
+	ilp32 targets and match DImode registers for lp64 targets.
+
 2017-03-03  Uros Bizjak  <ubizjak@gmail.com>
 
 	* g++.dg/pr71624.C: Disable for x32.

gcc/testsuite/gcc.target/mips/pr68273.c

@@ -75,5 +75,8 @@ op (Node q)
 }
 
 
-/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:SI 5 \\\$5\\\)" 2 "expand" } }  */
-/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:SI 6 \\\$6\\\)" 1 "expand" } }  */
+/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:SI 5 \\\$5\\\)" 2 "expand" { target { ilp32 } } } }  */
+/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:SI 6 \\\$6\\\)" 1 "expand" { target { ilp32 } } } }  */
+
+/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:DI 5 \\\$5\\\)" 2 "expand" { target { lp64 } } } }  */
+/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:DI 6 \\\$6\\\)" 1 "expand" { target { lp64 } } } }  */