Commit 31c5b444 by Richard Sandiford Committed by Richard Sandiford

m68k.md (movsf_cf_soft): Provide the same non-mov3q alternatives as movsi_cf.

gcc/
	* config/m68k/m68k.md (movsf_cf_soft): Provide the same non-mov3q
	alternatives as movsi_cf.
	(movsf_cf_hard): Add commentary.

From-SVN: r122606
parent a40ed0f3
2007-03-06 Richard Sandiford <richard@codesourcery.com>
* config/m68k/m68k.md (movsf_cf_soft): Provide the same non-mov3q
alternatives as movsi_cf.
(movsf_cf_hard): Add commentary.
2007-03-06 Kazu Hirata <kazu@codesourcery.com>
Richard Sandiford <richard@codesourcery.com>
......
......@@ -860,13 +860,15 @@
})
(define_insn "movsf_cf_soft"
[(set (match_operand:SF 0 "nonimmediate_operand" "=r,g")
(match_operand:SF 1 "general_operand" "g,r"))]
[(set (match_operand:SF 0 "nonimmediate_operand" "=r<Q>,g,U")
(match_operand:SF 1 "general_operand" "g,r<Q>,U"))]
"TARGET_COLDFIRE && !TARGET_COLDFIRE_FPU"
{
return "move%.l %1,%0";
})
;; SFmode MEMs are restricted to modes 2-4 if TARGET_COLDFIRE_FPU.
;; The move instructions can handle all combinations.
(define_insn "movsf_cf_hard"
[(set (match_operand:SF 0 "nonimmediate_operand" "=r<Q>U, f, f,mr,f,r<Q>,f
,m")
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment