Commit 3193108e by Eric Botcazou Committed by Eric Botcazou

sparc.md (movhi): Do not test constness of operand #1 twice.

	* config/sparc/sparc.md (movhi): Do not test constness
	of operand #1 twice.
	(movsi): Likewise.
	(movdi): Unconditionally accept zero as second operand
	when the first is memory.
	(movdi_insn_sp32): Handle above case.
	(DImode splitter): Use predicates.
	(DImode splitter): Use const_zero_operand predicate.
	(movsf_insn): Swap 2 alternatives.

From-SVN: r99856
parent e58a9aa1
2005-05-17 Eric Botcazou <ebotcazou@libertysurf.fr>
* config/sparc/sparc.md (movhi): Do not test constness
of operand #1 twice.
(movsi): Likewise.
(movdi): Unconditionally accept zero as second operand
when the first is memory.
(movdi_insn_sp32): Handle above case.
(DImode splitter): Use predicates.
(DImode splitter): Use const_zero_operand predicate.
(movsf_insn): Swap 2 alternatives.
2005-05-17 Zdenek Dvorak <dvorakz@suse.cz> 2005-05-17 Zdenek Dvorak <dvorakz@suse.cz>
* tree-ssa-loop-ivopts.c (find_bivs, find_givs_in_stmt_scev): Apply * tree-ssa-loop-ivopts.c (find_bivs, find_givs_in_stmt_scev): Apply
......
...@@ -1833,13 +1833,13 @@ ...@@ -1833,13 +1833,13 @@
/* This makes sure we will not get rematched due to splittage. */ /* This makes sure we will not get rematched due to splittage. */
if (! CONSTANT_P (operands[1]) || input_operand (operands[1], HImode)) if (! CONSTANT_P (operands[1]) || input_operand (operands[1], HImode))
; ;
else if (CONSTANT_P (operands[1]) else if (GET_CODE (operands[1]) != HIGH
&& GET_CODE (operands[1]) != HIGH
&& GET_CODE (operands[1]) != LO_SUM) && GET_CODE (operands[1]) != LO_SUM)
{ {
sparc_emit_set_const32 (operands[0], operands[1]); sparc_emit_set_const32 (operands[0], operands[1]);
DONE; DONE;
} }
movhi_is_ok: movhi_is_ok:
; ;
}) })
...@@ -1901,7 +1901,6 @@ ...@@ -1901,7 +1901,6 @@
if (GET_CODE (operands[1]) == LABEL_REF) if (GET_CODE (operands[1]) == LABEL_REF)
{ {
/* shit */
emit_insn (gen_movsi_pic_label_ref (operands[0], operands[1])); emit_insn (gen_movsi_pic_label_ref (operands[0], operands[1]));
DONE; DONE;
} }
...@@ -1929,13 +1928,13 @@ ...@@ -1929,13 +1928,13 @@
/* This makes sure we will not get rematched due to splittage. */ /* This makes sure we will not get rematched due to splittage. */
if (! CONSTANT_P (operands[1]) || input_operand (operands[1], SImode)) if (! CONSTANT_P (operands[1]) || input_operand (operands[1], SImode))
; ;
else if (CONSTANT_P (operands[1]) else if (GET_CODE (operands[1]) != HIGH
&& GET_CODE (operands[1]) != HIGH
&& GET_CODE (operands[1]) != LO_SUM) && GET_CODE (operands[1]) != LO_SUM)
{ {
sparc_emit_set_const32 (operands[0], operands[1]); sparc_emit_set_const32 (operands[0], operands[1]);
DONE; DONE;
} }
movsi_is_ok: movsi_is_ok:
; ;
}) })
...@@ -2045,12 +2044,7 @@ ...@@ -2045,12 +2044,7 @@
/* Handle MEM cases first. */ /* Handle MEM cases first. */
if (GET_CODE (operands[0]) == MEM) if (GET_CODE (operands[0]) == MEM)
{ {
/* If it's a REG, we can always do it. if (register_or_zero_operand (operands[1], DImode))
The const zero case is more complex, on v9
we can always perform it. */
if (register_operand (operands[1], DImode)
|| (TARGET_V9
&& (operands[1] == const0_rtx)))
goto movdi_is_ok; goto movdi_is_ok;
if (! reload_in_progress) if (! reload_in_progress)
...@@ -2131,7 +2125,7 @@ ...@@ -2131,7 +2125,7 @@
" J,U,T,r,o,i,r, f, T, o, f, f"))] " J,U,T,r,o,i,r, f, T, o, f, f"))]
"! TARGET_V9 "! TARGET_V9
&& (register_operand (operands[0], DImode) && (register_operand (operands[0], DImode)
|| register_operand (operands[1], DImode))" || register_or_zero_operand (operands[1], DImode))"
"@ "@
# #
std\t%1, %0 std\t%1, %0
...@@ -2410,7 +2404,9 @@ ...@@ -2410,7 +2404,9 @@
/* Slick... but this trick loses if this subreg constant part /* Slick... but this trick loses if this subreg constant part
can be done in one insn. */ can be done in one insn. */
if (low == high && (low & 0x3ff) != 0 && low + 0x1000 >= 0x2000) if (low == high
&& ! SPARC_SETHI32_P (high)
&& ! SPARC_SIMM13_P (high))
emit_insn (gen_movsi (gen_lowpart (SImode, operands[0]), emit_insn (gen_movsi (gen_lowpart (SImode, operands[0]),
gen_highpart (SImode, operands[0]))); gen_highpart (SImode, operands[0])));
else else
...@@ -2535,7 +2531,7 @@ ...@@ -2535,7 +2531,7 @@
(define_split (define_split
[(set (match_operand:DI 0 "memory_operand" "") [(set (match_operand:DI 0 "memory_operand" "")
(const_int 0))] (match_operand:DI 1 "const_zero_operand" ""))]
"reload_completed "reload_completed
&& (! TARGET_V9 && (! TARGET_V9
|| (! TARGET_ARCH64 || (! TARGET_ARCH64
...@@ -2618,7 +2614,7 @@ ...@@ -2618,7 +2614,7 @@
}) })
(define_insn "*movsf_insn" (define_insn "*movsf_insn"
[(set (match_operand:V32 0 "nonimmediate_operand" "=d,f,*r,*r,*r,*r,f,m,m") [(set (match_operand:V32 0 "nonimmediate_operand" "=d,f,*r,*r,*r,f,*r,m,m")
(match_operand:V32 1 "input_operand" "GY,f,*rRY,Q,S,m,m,f,*rGY"))] (match_operand:V32 1 "input_operand" "GY,f,*rRY,Q,S,m,m,f,*rGY"))]
"TARGET_FPU "TARGET_FPU
&& (register_operand (operands[0], <V32:MODE>mode) && (register_operand (operands[0], <V32:MODE>mode)
...@@ -2659,7 +2655,7 @@ ...@@ -2659,7 +2655,7 @@
gcc_unreachable (); gcc_unreachable ();
} }
} }
[(set_attr "type" "fga,fpmove,*,*,*,load,fpload,fpstore,store")]) [(set_attr "type" "fga,fpmove,*,*,*,fpload,load,fpstore,store")])
;; Exactly the same as above, except that all `f' cases are deleted. ;; Exactly the same as above, except that all `f' cases are deleted.
;; This is necessary to prevent reload from ever trying to use a `f' reg ;; This is necessary to prevent reload from ever trying to use a `f' reg
......
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