Commit 318881c0 by Kaveh R. Ghazi Committed by Kaveh Ghazi

sh-protos.h: New file.

	* sh-protos.h: New file.

	* sh.c: Include insn-config.h, toplev.h, recog.h and tm_p.h.
	Add static prototypes.  Fix compile time warnings.

	* sh.h: Move prototypes to sh-protos.h.  Fix compile time warnings.
	* sh.md: Likewise.
	* elf.h: Likewise.

From-SVN: r31418
parent 2b046bda
2000-01-14 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* sh-protos.h: New file.
* sh.c: Include insn-config.h, toplev.h, recog.h and tm_p.h.
Add static prototypes. Fix compile time warnings.
* sh.h: Move prototypes to sh-protos.h. Fix compile time warnings.
* sh.md: Likewise.
* elf.h: Likewise.
2000-01-14 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* arc-protos.h: New file.
* arc.c: Include tm_p.h. Add static prototypes. Fix compile
......
......@@ -84,7 +84,7 @@ Boston, MA 02111-1307, USA. */
#undef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
sprintf ((STRING), "*%s%s%d", LOCAL_LABEL_PREFIX, (PREFIX), (NUM))
sprintf ((STRING), "*%s%s%ld", LOCAL_LABEL_PREFIX, (PREFIX), (long)(NUM))
#undef ASM_OUTPUT_INTERNAL_LABEL
#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
......
/* Definitions of target machine for GNU compiler for Hitachi Super-H.
Copyright (C) 1993-1998, 1999 Free Software Foundation, Inc.
Contributed by Steve Chamberlain (sac@cygnus.com).
Improved by Jim Wilson (wilson@cygnus.com).
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#ifdef RTX_CODE
extern struct rtx_def *sh_builtin_saveregs PARAMS ((void));
extern struct rtx_def *prepare_scc_operands PARAMS ((enum rtx_code));
/* Declare functions defined in sh.c and used in templates. */
extern const char *output_branch PARAMS ((int, rtx, rtx *));
extern const char *output_ieee_ccmpeq PARAMS ((rtx, rtx *));
extern const char *output_branchy_insn PARAMS ((enum rtx_code, const char *, rtx, rtx *));
extern const char *output_movedouble PARAMS ((rtx, rtx[], enum machine_mode));
extern const char *output_movepcrel PARAMS ((rtx, rtx[], enum machine_mode));
extern const char *output_far_jump PARAMS ((rtx, rtx));
extern void machine_dependent_reorg PARAMS ((rtx));
extern struct rtx_def *sfunc_uses_reg PARAMS ((rtx));
extern int barrier_align PARAMS ((rtx));
extern int fp_zero_operand PARAMS ((rtx));
extern int fp_one_operand PARAMS ((rtx));
extern int fp_int_operand PARAMS ((rtx));
extern rtx get_fpscr_rtx PARAMS ((void));
extern void emit_sf_insn PARAMS ((rtx));
extern void emit_df_insn PARAMS ((rtx));
extern void print_operand_address PARAMS ((FILE *, rtx));
extern void print_operand PARAMS ((FILE *, rtx, int));
extern int expand_block_move PARAMS ((rtx *));
extern int prepare_move_operands PARAMS ((rtx[], enum machine_mode mode));
extern void from_compare PARAMS ((rtx *, int));
extern int shift_insns_rtx PARAMS ((rtx));
extern int shiftcosts PARAMS ((rtx));
extern int andcosts PARAMS ((rtx));
extern int multcosts PARAMS ((rtx));
extern void gen_ashift PARAMS ((int, int, rtx));
extern void gen_ashift_hi PARAMS ((int, int, rtx));
extern void gen_shifty_op PARAMS ((int, rtx *));
extern void gen_shifty_hi_op PARAMS ((int, rtx *));
extern int expand_ashiftrt PARAMS ((rtx *));
extern int sh_dynamicalize_shift_p PARAMS ((rtx));
extern int shl_and_kind PARAMS ((rtx, rtx, int *));
extern int shl_and_length PARAMS ((rtx));
extern int shl_and_scr_length PARAMS ((rtx));
extern int gen_shl_and PARAMS ((rtx, rtx, rtx, rtx));
extern int shl_sext_kind PARAMS ((rtx, rtx, int *));
extern int shl_sext_length PARAMS ((rtx));
extern int gen_shl_sext PARAMS ((rtx, rtx, rtx, rtx));
extern int regs_used PARAMS ((rtx, int));
extern void fixup_addr_diff_vecs PARAMS ((rtx));
extern int get_dest_uid PARAMS ((rtx, int));
extern void final_prescan_insn PARAMS ((rtx, rtx *, int));
extern int system_reg_operand PARAMS ((rtx, enum machine_mode));
extern int general_movsrc_operand PARAMS ((rtx, enum machine_mode));
extern int general_movdst_operand PARAMS ((rtx, enum machine_mode));
extern int arith_reg_operand PARAMS ((rtx, enum machine_mode));
extern int fp_arith_reg_operand PARAMS ((rtx, enum machine_mode));
extern int fp_extended_operand PARAMS ((rtx, enum machine_mode));
extern int arith_operand PARAMS ((rtx, enum machine_mode));
extern int arith_reg_or_0_operand PARAMS ((rtx, enum machine_mode));
extern int logical_operand PARAMS ((rtx, enum machine_mode));
extern int tertiary_reload_operand PARAMS ((rtx, enum machine_mode));
extern int fpscr_operand PARAMS ((rtx, enum machine_mode));
extern int commutative_float_operator PARAMS ((rtx, enum machine_mode));
extern int noncommutative_float_operator PARAMS ((rtx, enum machine_mode));
extern int binary_float_operator PARAMS ((rtx, enum machine_mode));
extern int reg_unused_after PARAMS ((rtx, rtx));
extern void expand_sf_unop PARAMS ((rtx (*)(rtx, rtx, rtx), rtx *));
extern void expand_sf_binop PARAMS ((rtx (*)(rtx, rtx, rtx, rtx), rtx *));
extern void expand_df_unop PARAMS ((rtx (*)(rtx, rtx, rtx), rtx *));
extern void expand_df_binop PARAMS ((rtx (*)(rtx, rtx, rtx, rtx), rtx *));
extern void expand_fp_branch PARAMS ((rtx (*)(void), rtx (*)(void)));
#ifdef TREE_CODE
extern void sh_va_start PARAMS ((int, tree, rtx));
extern rtx sh_va_arg PARAMS ((tree, tree));
#endif /* TREE_CODE */
#endif /* RTX_CODE */
#ifdef TREE_CODE
extern void sh_pragma_insert_attributes PARAMS ((tree, tree *, tree *));
extern int sh_valid_machine_decl_attribute PARAMS ((tree, tree, tree, tree));
extern tree sh_build_va_list PARAMS ((void));
#endif /* TREE_CODE */
extern const char *output_jump_label_table PARAMS ((void));
extern int sh_handle_pragma PARAMS ((int (*)(void), void (*)(int), const char *));
extern struct rtx_def *get_fpscr_rtx PARAMS ((void));
extern void output_file_start PARAMS ((FILE *));
extern void sh_expand_prologue PARAMS ((void));
extern void sh_expand_epilogue PARAMS ((void));
extern void function_epilogue PARAMS ((FILE *, int));
extern int initial_elimination_offset PARAMS ((int, int));
extern void emit_fpscr_use PARAMS ((void));
extern void remove_dead_before_cse PARAMS ((void));
......@@ -799,7 +799,7 @@ extern enum reg_class reg_class_from_letter[];
: R0_REGS) \
: (CLASS == FPSCR_REGS \
&& ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER) \
|| GET_CODE (X) == MEM && GET_CODE (XEXP ((X), 0)) == PLUS)) \
|| (GET_CODE (X) == MEM && GET_CODE (XEXP ((X), 0)) == PLUS)))\
? GENERAL_REGS \
: SECONDARY_OUTPUT_RELOAD_CLASS((CLASS),(MODE),(X)))
......@@ -1011,8 +1011,8 @@ struct sh_args {
#define PASS_IN_REG_P(CUM, MODE, TYPE) \
(((TYPE) == 0 \
|| (! TREE_ADDRESSABLE ((tree)(TYPE))) \
&& (! TARGET_HITACHI || ! AGGREGATE_TYPE_P (TYPE))) \
|| ((! TREE_ADDRESSABLE ((tree)(TYPE))) \
&& (! TARGET_HITACHI || ! AGGREGATE_TYPE_P (TYPE)))) \
&& (TARGET_SH3E \
? ((MODE) == BLKmode \
? (((CUM).arg_count[(int) SH_ARG_INT] * UNITS_PER_WORD \
......@@ -1135,7 +1135,7 @@ extern int current_function_anonymous_args;
/* Alignment required for a trampoline in bits . */
#define TRAMPOLINE_ALIGNMENT \
((CACHE_LOG < 3 || TARGET_SMALLCODE && ! TARGET_HARVARD) ? 32 : 64)
((CACHE_LOG < 3 || (TARGET_SMALLCODE && ! TARGET_HARVARD)) ? 32 : 64)
/* Emit RTL insns to initialize the variable parts of a trampoline.
FNADDR is an RTX for the address of the function's pure code.
......@@ -1166,7 +1166,6 @@ extern int current_function_anonymous_args;
: (rtx) 0)
/* Generate necessary RTL for __builtin_saveregs(). */
extern struct rtx_def *sh_builtin_saveregs ();
#define EXPAND_BUILTIN_SAVEREGS() sh_builtin_saveregs ()
/* Addressing modes, and classification of registers for them. */
......@@ -1344,7 +1343,7 @@ extern struct rtx_def *sh_builtin_saveregs ();
if (GET_MODE_SIZE (MODE) <= 8 && BASE_REGISTER_RTX_P (xop0)) \
GO_IF_LEGITIMATE_INDEX ((MODE), xop1, LABEL); \
if (GET_MODE_SIZE (MODE) <= 4 \
|| TARGET_SH4 && TARGET_FMOVD && MODE == DFmode) \
|| (TARGET_SH4 && TARGET_FMOVD && MODE == DFmode)) \
{ \
if (BASE_REGISTER_RTX_P (xop1) && INDEX_REGISTER_RTX_P (xop0))\
goto LABEL; \
......@@ -1843,10 +1842,10 @@ dtors_section() \
}
#define ASM_OUTPUT_REG_PUSH(file, v) \
fprintf ((file), "\tmov.l\tr%s,-@r15\n", (v));
fprintf ((file), "\tmov.l\tr%d,-@r15\n", (v));
#define ASM_OUTPUT_REG_POP(file, v) \
fprintf ((file), "\tmov.l\t@r15+,r%s\n", (v));
fprintf ((file), "\tmov.l\t@r15+,r%d\n", (v));
/* The assembler's names for the registers. RFP need not always be used as
the Real framepointer; it can also be used as a normal general register.
......@@ -1918,7 +1917,7 @@ extern char fp_reg_names[][5];
/* Make an internal label into a string. */
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
sprintf ((STRING), "*%s%s%d", LOCAL_LABEL_PREFIX, (PREFIX), (NUM))
sprintf ((STRING), "*%s%s%ld", LOCAL_LABEL_PREFIX, (PREFIX), (long)(NUM))
/* Output an internal label definition. */
#define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
......@@ -1945,6 +1944,8 @@ extern char fp_reg_names[][5];
case QImode: \
asm_fprintf ((STREAM), "\t.byte\t%LL%d-%LL%d\n", (VALUE),(REL)); \
break; \
default: \
break; \
}
/* Output an absolute table element. */
......@@ -2062,7 +2063,6 @@ do { char dstr[30]; \
extern struct rtx_def *sh_compare_op0;
extern struct rtx_def *sh_compare_op1;
extern struct rtx_def *prepare_scc_operands();
/* Which processor to schedule for. The elements of the enumeration must
match exactly the cpu attribute in the sh.md file. */
......@@ -2082,17 +2082,6 @@ extern enum machine_mode sh_addr_diff_vec_mode;
extern int optimize; /* needed for gen_casesi. */
/* Declare functions defined in sh.c and used in templates. */
extern char *output_branch();
extern char *output_ieee_ccmpeq();
extern char *output_branchy_insn();
extern char *output_shift();
extern char *output_movedouble();
extern char *output_movepcrel();
extern char *output_jump_label_table();
extern char *output_far_jump();
enum mdep_reorg_phase_e
{
SH_BEFORE_MDEP_REORG,
......@@ -2105,10 +2094,6 @@ enum mdep_reorg_phase_e
extern enum mdep_reorg_phase_e mdep_reorg_phase;
void machine_dependent_reorg ();
struct rtx_def *sfunc_uses_reg ();
int barrier_align ();
#define MACHINE_DEPENDENT_REORG(X) machine_dependent_reorg(X)
/* Generate calls to memcpy, memcmp and memset. */
......@@ -2119,7 +2104,6 @@ int barrier_align ();
is a C expression whose value is 1 if the pragma was handled by the
macro, zero otherwise. */
#define HANDLE_PRAGMA(GETC, UNGETC, NODE) sh_handle_pragma (GETC, UNGETC, NODE)
extern int sh_handle_pragma ();
/* Set when processing a function with pragma interrupt turned on. */
......@@ -2132,18 +2116,15 @@ extern struct rtx_def *sp_switch;
/* A C expression whose value is nonzero if IDENTIFIER with arguments ARGS
is a valid machine specific attribute for DECL.
The attributes in ATTRIBUTES have previously been assigned to DECL. */
extern int sh_valid_machine_decl_attribute ();
#define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, IDENTIFIER, ARGS) \
sh_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
extern void sh_pragma_insert_attributes ();
#define PRAGMA_INSERT_ATTRIBUTES(node, pattr, prefix_attr) \
sh_pragma_insert_attributes (node, pattr, prefix_attr)
extern int sh_flag_remove_dead_before_cse;
extern int rtx_equal_function_value_matters;
extern struct rtx_def *fpscr_rtx;
extern struct rtx_def *get_fpscr_rtx ();
/* Instructions with unfilled delay slots take up an extra two bytes for
......
......@@ -2365,8 +2365,8 @@
(match_operand:DF 1 "general_movsrc_operand" "r,FQ,m,r"))]
"(! TARGET_SH4 || reload_completed
/* ??? We provide some insn so that direct_{load,store}[DFmode] get set */
|| GET_CODE (operands[0]) == REG && REGNO (operands[0]) == 3
|| GET_CODE (operands[1]) == REG && REGNO (operands[1]) == 3)
|| (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == 3)
|| (GET_CODE (operands[1]) == REG && REGNO (operands[1]) == 3))
&& (arith_reg_operand (operands[0], DFmode)
|| arith_reg_operand (operands[1], DFmode))"
"* return output_movedouble (insn, operands, DFmode);"
......@@ -2821,8 +2821,8 @@
"
(! TARGET_SH3E
/* ??? We provide some insn so that direct_{load,store}[SFmode] get set */
|| GET_CODE (operands[0]) == REG && REGNO (operands[0]) == 3
|| GET_CODE (operands[1]) == REG && REGNO (operands[1]) == 3)
|| (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == 3)
|| (GET_CODE (operands[1]) == REG && REGNO (operands[1]) == 3))
&& (arith_reg_operand (operands[0], SFmode)
|| arith_reg_operand (operands[1], SFmode))"
"@
......@@ -3467,7 +3467,6 @@
{
if (TARGET_IEEE)
{
rtx t_reg = gen_rtx_REG (SImode, T_REG);
rtx lab = gen_label_rtx ();
prepare_scc_operands (EQ);
emit_jump_insn (gen_branch_true (lab));
......
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