Commit 30f78ec7 by Bill Schmidt Committed by William Schmidt

rs6000-cpus.def (OTHER_FUSION_MASKS): New #define.

2019-05-30  Bill Schmidt  <wschmidt@linux.ibm.com>
	    Michael Meissner  <meissner@linux.ibm.com>

	* rs6000-cpus.def (OTHER_FUSION_MASKS): New #define.
	(ISA_3_0_MASKS_SERVER): Mask off OTHER_FUSION_MASKS.
	(ISA_3_0_MASKS_IEEE): Remove OPTION_MASK_DIRECT_MOVE.
	(ISA_FUTURE_MASKS_SERVER): Add OPTION_MASK_PREFIXED_ADDR.
	(OTHER_FUTURE_MASKS): Likewise.
	(POWERPC_MASKS): Likewise.
	* rs6000.c (rs6000_option_override_internal): Error if -mpcrel is
	specified without -mprefixed-addr or -mcpu=future.  Error if
	-mprefixed-addr is specified without -mcpu=future.
	(rs6000_opt_masks): Add entry for prefixed-addr.
	* rs6000.opt (mprefixed-addr): New option.


Co-Authored-By: Michael Meissner <meissner@linux.ibm.com>

From-SVN: r271781
parent 0e2e15ab
2019-05-30 Bill Schmidt <wschmidt@linux.ibm.com>
Michael Meissner <meissner@linux.ibm.com>
* rs6000-cpus.def (OTHER_FUSION_MASKS): New #define.
(ISA_3_0_MASKS_SERVER): Mask off OTHER_FUSION_MASKS.
(ISA_3_0_MASKS_IEEE): Remove OPTION_MASK_DIRECT_MOVE.
(ISA_FUTURE_MASKS_SERVER): Add OPTION_MASK_PREFIXED_ADDR.
(OTHER_FUTURE_MASKS): Likewise.
(POWERPC_MASKS): Likewise.
* rs6000.c (rs6000_option_override_internal): Error if -mpcrel is
specified without -mprefixed-addr or -mcpu=future. Error if
-mprefixed-addr is specified without -mcpu=future.
(rs6000_opt_masks): Add entry for prefixed-addr.
* rs6000.opt (mprefixed-addr): New option.
2019-05-30 Sam Tebbs <sam.tebbs@arm.com> 2019-05-30 Sam Tebbs <sam.tebbs@arm.com>
* aarch64/aarch64.c (aarch64_post_cfi_startproc): Add * aarch64/aarch64.c (aarch64_post_cfi_startproc): Add
......
...@@ -56,29 +56,35 @@ ...@@ -56,29 +56,35 @@
| OPTION_MASK_QUAD_MEMORY \ | OPTION_MASK_QUAD_MEMORY \
| OPTION_MASK_QUAD_MEMORY_ATOMIC) | OPTION_MASK_QUAD_MEMORY_ATOMIC)
/* ISA masks setting fusion options. */
#define OTHER_FUSION_MASKS (OPTION_MASK_P8_FUSION \
| OPTION_MASK_P8_FUSION_SIGN)
/* Add ISEL back into ISA 3.0, since it is supposed to be a win. Do not add /* Add ISEL back into ISA 3.0, since it is supposed to be a win. Do not add
FLOAT128_HW here until we are ready to make -mfloat128 on by default. */ FLOAT128_HW here until we are ready to make -mfloat128 on by default. */
#define ISA_3_0_MASKS_SERVER (ISA_2_7_MASKS_SERVER \ #define ISA_3_0_MASKS_SERVER ((ISA_2_7_MASKS_SERVER \
| OPTION_MASK_ISEL \ | OPTION_MASK_ISEL \
| OPTION_MASK_MODULO \ | OPTION_MASK_MODULO \
| OPTION_MASK_P9_MINMAX \ | OPTION_MASK_P9_MINMAX \
| OPTION_MASK_P9_MISC \ | OPTION_MASK_P9_MISC \
| OPTION_MASK_P9_VECTOR) | OPTION_MASK_P9_VECTOR) \
& ~OTHER_FUSION_MASKS)
/* Support for the IEEE 128-bit floating point hardware requires a lot of the /* Support for the IEEE 128-bit floating point hardware requires a lot of the
VSX instructions that are part of ISA 3.0. */ VSX instructions that are part of ISA 3.0. */
#define ISA_3_0_MASKS_IEEE (OPTION_MASK_VSX \ #define ISA_3_0_MASKS_IEEE (OPTION_MASK_VSX \
| OPTION_MASK_P8_VECTOR \ | OPTION_MASK_P8_VECTOR \
| OPTION_MASK_P9_VECTOR \ | OPTION_MASK_P9_VECTOR)
| OPTION_MASK_DIRECT_MOVE)
/* Support for a future processor's features. */ /* Support for a future processor's features. */
#define ISA_FUTURE_MASKS_SERVER (ISA_3_0_MASKS_SERVER \ #define ISA_FUTURE_MASKS_SERVER (ISA_3_0_MASKS_SERVER \
| OPTION_MASK_FUTURE \ | OPTION_MASK_FUTURE \
| OPTION_MASK_PCREL) | OPTION_MASK_PCREL \
| OPTION_MASK_PREFIXED_ADDR)
/* Flags that need to be turned off if -mno-future. */ /* Flags that need to be turned off if -mno-future. */
#define OTHER_FUTURE_MASKS (OPTION_MASK_PCREL) #define OTHER_FUTURE_MASKS (OPTION_MASK_PCREL \
| OPTION_MASK_PREFIXED_ADDR)
/* Flags that need to be turned off if -mno-power9-vector. */ /* Flags that need to be turned off if -mno-power9-vector. */
#define OTHER_P9_VECTOR_MASKS (OPTION_MASK_FLOAT128_HW \ #define OTHER_P9_VECTOR_MASKS (OPTION_MASK_FLOAT128_HW \
...@@ -139,6 +145,7 @@ ...@@ -139,6 +145,7 @@
| OPTION_MASK_POWERPC64 \ | OPTION_MASK_POWERPC64 \
| OPTION_MASK_PPC_GFXOPT \ | OPTION_MASK_PPC_GFXOPT \
| OPTION_MASK_PPC_GPOPT \ | OPTION_MASK_PPC_GPOPT \
| OPTION_MASK_PREFIXED_ADDR \
| OPTION_MASK_QUAD_MEMORY \ | OPTION_MASK_QUAD_MEMORY \
| OPTION_MASK_QUAD_MEMORY_ATOMIC \ | OPTION_MASK_QUAD_MEMORY_ATOMIC \
| OPTION_MASK_RECIP_PRECISION \ | OPTION_MASK_RECIP_PRECISION \
......
...@@ -4296,15 +4296,24 @@ rs6000_option_override_internal (bool global_init_p) ...@@ -4296,15 +4296,24 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_isa_flags &= ~OPTION_MASK_FLOAT128_HW; rs6000_isa_flags &= ~OPTION_MASK_FLOAT128_HW;
} }
/* -mpcrel requires the prefixed load/store support on FUTURE systems. */ /* -mpcrel requires prefixed load/store addressing. */
if (!TARGET_FUTURE && TARGET_PCREL) if (TARGET_PCREL && !TARGET_PREFIXED_ADDR)
{ {
if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0) if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0)
error ("%qs requires %qs", "-mpcrel", "-mcpu=future"); error ("%qs requires %qs", "-mpcrel", "-mprefixed-addr");
rs6000_isa_flags &= ~OPTION_MASK_PCREL; rs6000_isa_flags &= ~OPTION_MASK_PCREL;
} }
/* -mprefixed-addr (and hence -mpcrel) requires -mcpu=future. */
if (TARGET_PREFIXED_ADDR && !TARGET_FUTURE)
{
if ((rs6000_isa_flags_explicit & OPTION_MASK_PCREL) != 0)
error ("%qs requires %qs", "-mprefixed-addr", "-mcpu=future");
rs6000_isa_flags &= ~(OPTION_MASK_PCREL | OPTION_MASK_PREFIXED_ADDR);
}
/* Print the options after updating the defaults. */ /* Print the options after updating the defaults. */
if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags); rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags);
...@@ -36375,6 +36384,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] = ...@@ -36375,6 +36384,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
{ "power9-vector", OPTION_MASK_P9_VECTOR, false, true }, { "power9-vector", OPTION_MASK_P9_VECTOR, false, true },
{ "powerpc-gfxopt", OPTION_MASK_PPC_GFXOPT, false, true }, { "powerpc-gfxopt", OPTION_MASK_PPC_GFXOPT, false, true },
{ "powerpc-gpopt", OPTION_MASK_PPC_GPOPT, false, true }, { "powerpc-gpopt", OPTION_MASK_PPC_GPOPT, false, true },
{ "prefixed-addr", OPTION_MASK_PREFIXED_ADDR, false, true },
{ "quad-memory", OPTION_MASK_QUAD_MEMORY, false, true }, { "quad-memory", OPTION_MASK_QUAD_MEMORY, false, true },
{ "quad-memory-atomic", OPTION_MASK_QUAD_MEMORY_ATOMIC, false, true }, { "quad-memory-atomic", OPTION_MASK_QUAD_MEMORY_ATOMIC, false, true },
{ "recip-precision", OPTION_MASK_RECIP_PRECISION, false, true }, { "recip-precision", OPTION_MASK_RECIP_PRECISION, false, true },
...@@ -574,6 +574,10 @@ mfuture ...@@ -574,6 +574,10 @@ mfuture
Target Report Mask(FUTURE) Var(rs6000_isa_flags) Target Report Mask(FUTURE) Var(rs6000_isa_flags)
Use instructions for a future architecture. Use instructions for a future architecture.
mprefixed-addr
Target Undocumented Mask(PREFIXED_ADDR) Var(rs6000_isa_flags)
Generate (do not generate) prefixed memory instructions.
mpcrel mpcrel
Target Report Mask(PCREL) Var(rs6000_isa_flags) Target Report Mask(PCREL) Var(rs6000_isa_flags)
Generate (do not generate) pc-relative memory addressing. Generate (do not generate) pc-relative memory addressing.
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment