Commit 30e32805 by Tom Wood

(cpu attribute): List m88100 first for more efficient code in insn-attrtab.c.

(cpu attribute): List m88100 first for more efficient
        code in insn-attrtab.c.
(rotate/and split pattern): Fix typo.

From-SVN: r1724
parent 7ddb6885
......@@ -28,13 +28,13 @@
(define_expand "m88k_sccs_id"
[(match_operand:SI 0 "" "")]
""
"{ static char sccs_id[] = \"@(#)m88k.md 2.2.6.6 13 Jul 1992 09:43:57\";
"{ static char sccs_id[] = \"@(#)m88k.md 2.2.6.10 28 Jul 1992 10:22:08\";
FAIL; }")
;; Attribute specifications
; Target CPU.
(define_attr "cpu" "m88000,m88100,m88110"
(define_attr "cpu" "m88100,m88110,m88000"
(const (symbol_ref "m88k_cpu")))
; Type of each instruction. Default is arithmetic.
......@@ -619,15 +619,6 @@
;; rotate/and[.c] and rotate/ior[.c]
(define_insn ""
[(set (match_operand:CC 0 "register_operand" "=r")
(ior:CC (rotate:CC (match_operand:CC 1 "register_operand" "r")
(match_operand:CC 2 "int5_operand" ""))
(match_operand:CC 3 "register_operand" "r")))
(clobber (match_scratch:CC 4 "=r"))]
""
"#")
(define_split
[(set (match_operand:CC 0 "register_operand" "=r")
(ior:CC (rotate:CC (match_operand:CC 1 "register_operand" "r")
......@@ -643,8 +634,8 @@
(define_insn ""
[(set (match_operand:CC 0 "register_operand" "=r")
(ior:CC (not:CC (rotate:CC (match_operand:CC 1 "register_operand" "r")
(match_operand:CC 2 "int5_operand" "")))
(ior:CC (rotate:CC (match_operand:CC 1 "register_operand" "r")
(match_operand:CC 2 "int5_operand" ""))
(match_operand:CC 3 "register_operand" "r")))
(clobber (match_scratch:CC 4 "=r"))]
""
......@@ -665,8 +656,8 @@
(define_insn ""
[(set (match_operand:CC 0 "register_operand" "=r")
(and:CC (rotate:CC (match_operand:CC 1 "register_operand" "r")
(match_operand:CC 2 "int5_operand" ""))
(ior:CC (not:CC (rotate:CC (match_operand:CC 1 "register_operand" "r")
(match_operand:CC 2 "int5_operand" "")))
(match_operand:CC 3 "register_operand" "r")))
(clobber (match_scratch:CC 4 "=r"))]
""
......@@ -682,13 +673,13 @@
[(set (match_dup 4)
(rotate:CC (match_dup 1) (match_dup 2)))
(set (match_dup 0)
(ior:CC (match_dup 4) (match_dup 3)))]
(and:CC (match_dup 4) (match_dup 3)))]
"")
(define_insn ""
[(set (match_operand:CC 0 "register_operand" "=r")
(and:CC (not:CC (rotate:CC (match_operand:CC 1 "register_operand" "r")
(match_operand:CC 2 "int5_operand" "")))
(and:CC (rotate:CC (match_operand:CC 1 "register_operand" "r")
(match_operand:CC 2 "int5_operand" ""))
(match_operand:CC 3 "register_operand" "r")))
(clobber (match_scratch:CC 4 "=r"))]
""
......@@ -706,6 +697,15 @@
(set (match_dup 0)
(and:CC (not:CC (match_dup 4)) (match_dup 3)))]
"")
(define_insn ""
[(set (match_operand:CC 0 "register_operand" "=r")
(and:CC (not:CC (rotate:CC (match_operand:CC 1 "register_operand" "r")
(match_operand:CC 2 "int5_operand" "")))
(match_operand:CC 3 "register_operand" "r")))
(clobber (match_scratch:CC 4 "=r"))]
""
"#")
;; Recognize bcnd instructions for integer values. This is distinguished
;; from a conditional branch instruction (below) with SImode instead of
......
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