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riscv-gcc-1
Commit 30e2dcbf by Richard Henderson Committed by Richard Henderson
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alpha.md (fp cmp): Replicate patterns for ALPHA_TP_INSN. 

        * alpha.md (fp cmp): Replicate patterns for ALPHA_TP_INSN.
        (fcmov): Remove ALPHA_TP_INSN patterns -- fcmov doesn't trap.

From-SVN: r21501
parent 624d5e13
Showing with 45 additions and 34 deletions
gcc/ChangeLog
Thu Jul 30 19:15:53 1998 Richard Henderson <rth@cygnus.com>
* alpha.md (fp cmp): Replicate patterns for ALPHA_TP_INSN.
(fcmov): Remove ALPHA_TP_INSN patterns -- fcmov doesn't trap.
Thu Jul 30 19:50:15 1998 David Edelsohn <edelsohn@mhpcc.edu>
* rs6000/x-aix43 (AR_FOR_TARGET_FLAGS): Delete.
......
gcc/config/alpha/alpha.md
......@@ -2729,6 +2729,17 @@
(set_attr "trap" "yes")])
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=&f")
(match_operator:DF 1 "alpha_comparison_operator"
[(float_extend:DF
(match_operand:SF 2 "reg_or_fp0_operand" "fG"))
(match_operand:DF 3 "reg_or_fp0_operand" "fG")]))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN"
"cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd")
(set_attr "trap" "yes")])
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=f")
(match_operator:DF 1 "alpha_comparison_operator"
[(float_extend:DF
......@@ -2740,6 +2751,17 @@
(set_attr "trap" "yes")])
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=&f")
(match_operator:DF 1 "alpha_comparison_operator"
[(match_operand:DF 2 "reg_or_fp0_operand" "fG")
(float_extend:DF
(match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN"
"cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd")
(set_attr "trap" "yes")])
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=f")
(match_operator:DF 1 "alpha_comparison_operator"
[(match_operand:DF 2 "reg_or_fp0_operand" "fG")
......@@ -2751,30 +2773,28 @@
(set_attr "trap" "yes")])
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=f")
[(set (match_operand:DF 0 "register_operand" "=&f")
(match_operator:DF 1 "alpha_comparison_operator"
[(float_extend:DF
(match_operand:SF 2 "reg_or_fp0_operand" "fG"))
(float_extend:DF
(match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN"
"TARGET_FP && alpha_tp == ALPHA_TP_INSN"
"cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd")
(set_attr "trap" "yes")])
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=&f,f")
(if_then_else:DF
(match_operator 3 "signed_comparison_operator"
[(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
(match_operand:DF 2 "fp0_operand" "G,G")])
(match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
(match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN"
"@
fcmov%C3 %R4,%R1,%0
fcmov%D3 %R4,%R5,%0"
[(set_attr "type" "fcmov")])
[(set (match_operand:DF 0 "register_operand" "=f")
(match_operator:DF 1 "alpha_comparison_operator"
[(float_extend:DF
(match_operand:SF 2 "reg_or_fp0_operand" "fG"))
(float_extend:DF
(match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN"
"cmp%-%C1%' %R2,%R3,%0"
[(set_attr "type" "fadd")
(set_attr "trap" "yes")])
(define_insn ""
[(set (match_operand:DF 0 "register_operand" "=f,f")
......@@ -2784,21 +2804,7 @@
(match_operand:DF 2 "fp0_operand" "G,G")])
(match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
(match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN"
"@
fcmov%C3 %R4,%R1,%0
fcmov%D3 %R4,%R5,%0"
[(set_attr "type" "fcmov")])
(define_insn ""
[(set (match_operand:SF 0 "register_operand" "=&f,f")
(if_then_else:SF
(match_operator 3 "signed_comparison_operator"
[(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
(match_operand:DF 2 "fp0_operand" "G,G")])
(match_operand:SF 1 "reg_or_fp0_operand" "fG,0")
(match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))]
"TARGET_FP && alpha_tp == ALPHA_TP_INSN"
"TARGET_FP"
"@
fcmov%C3 %R4,%R1,%0
fcmov%D3 %R4,%R5,%0"
......@@ -2812,7 +2818,7 @@
(match_operand:DF 2 "fp0_operand" "G,G")])
(match_operand:SF 1 "reg_or_fp0_operand" "fG,0")
(match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN"
"TARGET_FP"
"@
fcmov%C3 %R4,%R1,%0
fcmov%D3 %R4,%R5,%0"
......@@ -2826,7 +2832,7 @@
(match_operand:DF 2 "fp0_operand" "G,G")])
(float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG,0"))
(match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN"
"TARGET_FP"
"@
fcmov%C3 %R4,%R1,%0
fcmov%D3 %R4,%R5,%0"
......@@ -2841,7 +2847,7 @@
(match_operand:DF 2 "fp0_operand" "G,G")])
(match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
(match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN"
"TARGET_FP"
"@
fcmov%C3 %R4,%R1,%0
fcmov%D3 %R4,%R5,%0"
......@@ -2856,7 +2862,7 @@
(match_operand:DF 2 "fp0_operand" "G,G")])
(match_operand:SF 1 "reg_or_fp0_operand" "fG,0")
(match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN"
"TARGET_FP"
"@
fcmov%C3 %R4,%R1,%0
fcmov%D3 %R4,%R5,%0"
......@@ -2871,7 +2877,7 @@
(match_operand:DF 2 "fp0_operand" "G,G")])
(float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG,0"))
(match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
"TARGET_FP && alpha_tp != ALPHA_TP_INSN"
"TARGET_FP"
"@
fcmov%C3 %R4,%R1,%0
fcmov%D3 %R4,%R5,%0"
......
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