24k.md, [...]: Fix comment typos.

	* config/mips/24k.md, config/sh/divtab.c, config/sh/sh.c,
	config/sh/sh.md, config/sh/superh.h: Fix comment typos.
	* doc/invoke.texi: Fix typos.

From-SVN: r99516

gcc/ChangeLog

+2005-05-10  Kazu Hirata  <kazu@cs.umass.edu>
+
+	* config/mips/24k.md, config/sh/divtab.c, config/sh/sh.c,
+	config/sh/sh.md, config/sh/superh.h: Fix comment typos.
+	* doc/invoke.texi: Fix typos.
+
 2005-05-10  Gabor Loki <loki@gcc.gnu.org>
 
 	PR c/17913

gcc/config/mips/24k.md

@@ -225,7 +225,7 @@
 ;; These timings are therefore twice the values in the 24K manual,
 ;; which are quoted in fpu clocks.
 ;;
-;; The 24kx is a 24k configuered with 1:1 cpu and fpu, so use
+;; The 24kx is a 24k configured with 1:1 cpu and fpu, so use
 ;; the unscaled timings
 
 (define_reservation "r24k_fpu_iss"	"r24k_iss+(r24k_fpu_arith*2)")

gcc/config/sh/divtab.c

@@ -25,7 +25,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
 Boston, MA 02111-1307, USA.  */
 
 /* Calculate division table for SH5Media integer division
-   Contributed by Joern Rernnecke
+   Contributed by Joern Rennecke
    joern.rennecke@superh.com  */
 
 #include <stdio.h>

gcc/config/sh/sh.c

@@ -747,7 +747,7 @@ print_operand (FILE *stream, rtx x, int code)
 	    if (GET_CODE (inner) != REG || GET_MODE_SIZE (inner_mode) > 8)
 	      abort ();
 	    /* Floating point register pairs are always big endian;
-	       general purpose registes are 64 bit wide.  */
+	       general purpose registers are 64 bit wide.  */
 	    regno = REGNO (inner);
 	    regno = (HARD_REGNO_NREGS (regno, inner_mode)
 		     - HARD_REGNO_NREGS (regno, mode))
@@ -10947,10 +10947,10 @@ sh_adjust_unroll_max (struct loop * loop, int insn_count,
    are to be modified.
 
    This is like replace_rtx, except that we operate on N_REPLACEMENTS
-   replacements sumultanously - FROM(n) is replacements[n*2] and to(n) is
+   replacements simultaneously - FROM(n) is replacements[n*2] and to(n) is
    replacements[n*2+1] - and that we take mode changes into account.
 
-   If a replacement is ambigous, return NULL_RTX.
+   If a replacement is ambiguous, return NULL_RTX.
 
    If MODIFY is zero, don't modify any rtl in place,
    just return zero or nonzero for failure / success.  */
@@ -11177,7 +11177,7 @@ shmedia_prepare_call_address (rtx fnaddr, int is_sibcall)
   /* If ptabs might trap, make this visible to the rest of the compiler.
      We generally assume that symbols pertain to valid locations, but
      it is possible to generate invalid symbols with asm or linker tricks.
-     In a list of functions where each returns its sucessor, an invalid
+     In a list of functions where each returns its successor, an invalid
      symbol might denote an empty list.  */
   if (!TARGET_PT_FIXED
       && (!is_sym || TARGET_INVALID_SYMBOLS)

gcc/config/sh/sh.md

@@ -1108,7 +1108,7 @@
 
   /* We want to replace occurences of operands[0] with operands[1] and
      operands[2] with operands[0] in operands[4]/operands[5].
-     Doing just two replace_rtx calls naiively would result in the second
+     Doing just two replace_rtx calls naively would result in the second
      replacement undoing all that the first did if operands[1] and operands[2]
      are identical, so we must do this simultaneously.  */
   replacements[0] = operands[0];

gcc/config/sh/superh.h

@@ -23,7 +23,7 @@ Boston, MA 02111-1307, USA.  */
    It configures the compiler for SH4 only and switches the default
    endianess to little (although big endian is still available).
    It also configures the spec file to the default board configuration
-   but in such a way that it can be overriden by a boardspecs file
+   but in such a way that it can be overridden by a boardspecs file
    (using the -specs= option). This file is expected to disable the
    defaults and provide options --defsym _start and --defsym _stack
    which are required by the SuperH configuration of GNU ld.
@@ -90,7 +90,7 @@ extern const char * boardtype;
 extern const char * osruntime;
 
 
-/* Override the linker spec strings to use the new emultation
+/* Override the linker spec strings to use the new emulation
    The specstrings are concatenated as follows
    LINK_EMUL_PREFIX.(''|'32'|'64'|LINK_DEFAULT_CPU_EMUL).SUBTARGET_LINK_EMUL_SUFFIX
 */

gcc/doc/invoke.texi

@@ -11513,11 +11513,11 @@ one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call,
 inv:call2, inv:fp .
 "fp" performs the operation in floating point.  This has a very high latency,
 but needs only a few instructions, so it might be a good choice if
-your code has enough easily esploitable ILP to allow the compiler to
+your code has enough easily exploitable ILP to allow the compiler to
 schedule the floating point instructions together with other instructions.
 Division by zero causes a floating point exception.
 "inv" uses integer operations to calculate the inverse of the divisor,
-and then multiplies the divident with the inverse.  This strategy allows
+and then multiplies the dividend with the inverse.  This strategy allows
 cse and hoisting of the inverse calculation.  Division by zero calculates
 an unspecified result, but does not trap.
 "inv:minlat" is a variant of "inv" where if no cse / hoisting opportunities
@@ -11534,7 +11534,7 @@ assumes that a pointer to a lookup table has already been set up, which
 exposes the pointer load to cse / code hoisting optimizations.
 "inv:call", "inv:call2" and "inv:fp" all use the "inv" algorithm for initial
 code generation, but if the code stays unoptimized, revert to the "call",
-"call2", or "fp" strategies, resspectively.  Note that the
+"call2", or "fp" strategies, respectively.  Note that the
 potentially-trapping side effect of division by zero is carried by a
 separate instruction, so it is possible that all the integer instructions
 are hoisted out, but the marker for the side effect stays where it is.
@@ -11543,7 +11543,7 @@ A recombination to fp operations or a call is not possible in that case.
 that the inverse calculation was nor separated from the multiply, they speed
 up division where the dividend fits into 20 bits (plus sign where applicable),
 by inserting a test to skip a number of operations in this case; this test
-slows down the case of larger divdends.  inv20u assumes the case of a such
+slows down the case of larger dividends.  inv20u assumes the case of a such
 a small dividend to be unlikely, and inv20l assumes it to be likely.
 
 @item -mdivsi3_libfunc=@var{name}
@@ -11565,7 +11565,7 @@ Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
 This is only safe if the hardware and/or OS implement 32 bit wrap-around
 semantics for the indexed addressing mode.  The architecture allows the
 implementation of processors with 64 bit MMU, which the OS could use to
-get 32 bit addressing, but since no current harware implementation supports
+get 32 bit addressing, but since no current hardware implementation supports
 this or any other way to make the indexed addressing mode safe to use in
 the 32 bit ABI, the default is -mno-indexed-addressing.
 
@@ -11585,7 +11585,7 @@ __do_global_ctors, a part of libgcc that runs constructors at program
 startup, calls functions in a list which is delimited by -1.  With the
 -mpt-fixed option, the ptabs will be done before testing against -1.
 That means that all the constructors will be run a bit quicker, but when
-the loop comes to the end of the list, the pprogram crashes because ptabs
+the loop comes to the end of the list, the program crashes because ptabs
 loads -1 into a target register.  Since this option is unsafe for any
 hardware implementing the current architecture specification, the default
 is -mno-pt-fixed.  Unless the user specifies a specific cost with