entered into RCS

From-SVN: r1167

gcc/config/mips/mips.h

@@ -125,7 +125,6 @@ extern unsigned long	compute_frame_size ();
 extern void		expand_block_move ();
 extern int		equality_op ();
 extern int		fcmp_op ();
-extern void		final_prescan_insn ();
 extern int		fpsw_register_operand ();
 extern struct rtx_def *	function_arg ();
 extern void		function_arg_advance ();
@@ -136,7 +135,6 @@ extern void		gen_conditional_branch ();
 extern struct rtx_def * gen_int_relational ();
 extern void		init_cumulative_args ();
 extern int		large_int ();
-extern int		lui_int ();
 extern int		md_register_operand ();
 extern int		mips_address_cost ();
 extern void		mips_asm_file_end ();
@@ -430,7 +428,7 @@ while (0)
 
 /* Print subsidiary information on the compiler version in use.  */
 
-#define MIPS_VERSION "[AL 1.1, MM 20]"
+#define MIPS_VERSION "[AL 1.1, MM 19]"
 
 #ifndef MACHINE_TYPE
 #define MACHINE_TYPE "BSD Mips"
@@ -2444,8 +2442,8 @@ while (0)
 #define CLASS_DIVMOD_OP		0x02	/* operator is {,U}{DIV,MOD} */
 #define CLASS_UNSIGNED_OP	0x04	/* operator is U{DIV,MOD} */
 #define CLASS_CMP_OP		0x08	/* operator is comparison */
-#define CLASS_FCMP_OP		0x08	/* operator is fp. compare */
 #define CLASS_EQUALITY_OP	0x10	/* operator is == or != */
+#define CLASS_FCMP_OP		0x08	/* operator is fp. compare */
 
 #define CLASS_UNS_CMP_OP	(CLASS_UNSIGNED_OP | CLASS_CMP_OP)
 
@@ -2506,7 +2504,47 @@ while (0)
    statistics.  */
 
 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)			\
-  final_prescan_insn (INSN, OPVEC, NOPERANDS)
+do									\
+  {									\
+    if (dslots_number_nops > 0 && mips_load_reg != (rtx)0)		\
+      {									\
+	enum machine_mode mode = GET_MODE (mips_load_reg);		\
+	rtx pattern = PATTERN (INSN);					\
+									\
+	if (reg_mentioned_p (mips_load_reg, pattern)			\
+	    || (mips_load_reg2 != (rtx)0				\
+		&& reg_mentioned_p (mips_load_reg2, pattern))		\
+	    || (mips_load_reg3 != (rtx)0				\
+		&& reg_mentioned_p (mips_load_reg3, pattern))		\
+	    || (mips_load_reg4 != (rtx)0				\
+		&& reg_mentioned_p (mips_load_reg4, pattern))		\
+	    || get_attr_length (INSN) == 0)				\
+	  {								\
+	    fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \
+	  }								\
+	else								\
+	  dslots_load_filled++;						\
+									\
+	while (--dslots_number_nops > 0)				\
+	  fputs ((set_noreorder) ? "\tnop\n" : "\t#nop\n", asm_out_file); \
+									\
+	mips_load_reg  = (rtx)0;					\
+	mips_load_reg2 = (rtx)0;					\
+	mips_load_reg3 = (rtx)0;					\
+	mips_load_reg4 = (rtx)0;					\
+									\
+	if (set_noreorder && --set_noreorder == 0)			\
+	  fputs ("\t.set\treorder\n", asm_out_file);			\
+      }									\
+									\
+    if (TARGET_STATS)							\
+      {									\
+	enum rtx_code code = GET_CODE (INSN);				\
+	if (code == JUMP_INSN || code == CALL_INSN)			\
+	  dslots_jump_total++;						\
+      }									\
+  }									\
+while (0)
 
 
 /* Tell final.c how to eliminate redundant test instructions.
@@ -3272,3 +3310,4 @@ while (0)
 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
+