Commit 2fe37211 by Bernd Edlinger Committed by Bernd Edlinger

re PR target/77308 (surprisingly large stack usage for sha512 on arm)

2016-11-17  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR target/77308
        * config/arm/arm.md (*thumb2_ldrd, *thumb2_ldrd_base,
        *thumb2_ldrd_base_neg, *thumb2_strd, *thumb2_strd_base,
        *thumb2_strd_base_neg): Recognize insn regardless of
        current_tune->prefer_ldrd_strd.
        * config/arm/ldrdstrd.md: Enable all ldrd/strd peephole rules
        whenever possible.

testsuite:
2016-11-17  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR target/77308
        * gcc.target/arm/pr53447-5.c: New test.
        * lib/target-supports.exp
        (check_effective_target_arm_prefer_ldrd_strd): Adjust.

From-SVN: r242549
parent 6c28e6ae
2016-11-17 Bernd Edlinger <bernd.edlinger@hotmail.de>
PR target/77308
* config/arm/arm.md (*thumb2_ldrd, *thumb2_ldrd_base,
*thumb2_ldrd_base_neg, *thumb2_strd, *thumb2_strd_base,
*thumb2_strd_base_neg): Recognize insn regardless of
current_tune->prefer_ldrd_strd.
* config/arm/ldrdstrd.md: Enable all ldrd/strd peephole rules
whenever possible.
2016-11-17 Claudiu Zissulescu <claziss@synopsys.com> 2016-11-17 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_ccfsm_post_advance): Handle return * config/arc/arc.c (arc_ccfsm_post_advance): Handle return
...@@ -11641,7 +11641,6 @@ ...@@ -11641,7 +11641,6 @@
(mem:SI (plus:SI (match_dup 1) (mem:SI (plus:SI (match_dup 1)
(match_operand:SI 4 "const_int_operand" ""))))] (match_operand:SI 4 "const_int_operand" ""))))]
"TARGET_LDRD && TARGET_THUMB2 && reload_completed "TARGET_LDRD && TARGET_THUMB2 && reload_completed
&& current_tune->prefer_ldrd_strd
&& ((INTVAL (operands[2]) + 4) == INTVAL (operands[4])) && ((INTVAL (operands[2]) + 4) == INTVAL (operands[4]))
&& (operands_ok_ldrd_strd (operands[0], operands[3], && (operands_ok_ldrd_strd (operands[0], operands[3],
operands[1], INTVAL (operands[2]), operands[1], INTVAL (operands[2]),
...@@ -11658,7 +11657,6 @@ ...@@ -11658,7 +11657,6 @@
(mem:SI (plus:SI (match_dup 1) (mem:SI (plus:SI (match_dup 1)
(const_int 4))))] (const_int 4))))]
"TARGET_LDRD && TARGET_THUMB2 && reload_completed "TARGET_LDRD && TARGET_THUMB2 && reload_completed
&& current_tune->prefer_ldrd_strd
&& (operands_ok_ldrd_strd (operands[0], operands[2], && (operands_ok_ldrd_strd (operands[0], operands[2],
operands[1], 0, false, true))" operands[1], 0, false, true))"
"ldrd%?\t%0, %2, [%1]" "ldrd%?\t%0, %2, [%1]"
...@@ -11673,7 +11671,6 @@ ...@@ -11673,7 +11671,6 @@
(set (match_operand:SI 2 "s_register_operand" "=r") (set (match_operand:SI 2 "s_register_operand" "=r")
(mem:SI (match_dup 1)))] (mem:SI (match_dup 1)))]
"TARGET_LDRD && TARGET_THUMB2 && reload_completed "TARGET_LDRD && TARGET_THUMB2 && reload_completed
&& current_tune->prefer_ldrd_strd
&& (operands_ok_ldrd_strd (operands[0], operands[2], && (operands_ok_ldrd_strd (operands[0], operands[2],
operands[1], -4, false, true))" operands[1], -4, false, true))"
"ldrd%?\t%0, %2, [%1, #-4]" "ldrd%?\t%0, %2, [%1, #-4]"
...@@ -11689,7 +11686,6 @@ ...@@ -11689,7 +11686,6 @@
(match_operand:SI 3 "const_int_operand" ""))) (match_operand:SI 3 "const_int_operand" "")))
(match_operand:SI 4 "s_register_operand" "r"))] (match_operand:SI 4 "s_register_operand" "r"))]
"TARGET_LDRD && TARGET_THUMB2 && reload_completed "TARGET_LDRD && TARGET_THUMB2 && reload_completed
&& current_tune->prefer_ldrd_strd
&& ((INTVAL (operands[1]) + 4) == INTVAL (operands[3])) && ((INTVAL (operands[1]) + 4) == INTVAL (operands[3]))
&& (operands_ok_ldrd_strd (operands[2], operands[4], && (operands_ok_ldrd_strd (operands[2], operands[4],
operands[0], INTVAL (operands[1]), operands[0], INTVAL (operands[1]),
...@@ -11706,7 +11702,6 @@ ...@@ -11706,7 +11702,6 @@
(const_int 4))) (const_int 4)))
(match_operand:SI 2 "s_register_operand" "r"))] (match_operand:SI 2 "s_register_operand" "r"))]
"TARGET_LDRD && TARGET_THUMB2 && reload_completed "TARGET_LDRD && TARGET_THUMB2 && reload_completed
&& current_tune->prefer_ldrd_strd
&& (operands_ok_ldrd_strd (operands[1], operands[2], && (operands_ok_ldrd_strd (operands[1], operands[2],
operands[0], 0, false, false))" operands[0], 0, false, false))"
"strd%?\t%1, %2, [%0]" "strd%?\t%1, %2, [%0]"
...@@ -11721,7 +11716,6 @@ ...@@ -11721,7 +11716,6 @@
(set (mem:SI (match_dup 0)) (set (mem:SI (match_dup 0))
(match_operand:SI 2 "s_register_operand" "r"))] (match_operand:SI 2 "s_register_operand" "r"))]
"TARGET_LDRD && TARGET_THUMB2 && reload_completed "TARGET_LDRD && TARGET_THUMB2 && reload_completed
&& current_tune->prefer_ldrd_strd
&& (operands_ok_ldrd_strd (operands[1], operands[2], && (operands_ok_ldrd_strd (operands[1], operands[2],
operands[0], -4, false, false))" operands[0], -4, false, false))"
"strd%?\t%1, %2, [%0, #-4]" "strd%?\t%1, %2, [%0, #-4]"
......
...@@ -29,9 +29,7 @@ ...@@ -29,9 +29,7 @@
(match_operand:SI 2 "memory_operand" "")) (match_operand:SI 2 "memory_operand" ""))
(set (match_operand:SI 1 "arm_general_register_operand" "") (set (match_operand:SI 1 "arm_general_register_operand" "")
(match_operand:SI 3 "memory_operand" ""))] (match_operand:SI 3 "memory_operand" ""))]
"TARGET_LDRD "TARGET_LDRD"
&& current_tune->prefer_ldrd_strd
&& !optimize_function_for_size_p (cfun)"
[(const_int 0)] [(const_int 0)]
{ {
if (!gen_operands_ldrd_strd (operands, true, false, false)) if (!gen_operands_ldrd_strd (operands, true, false, false))
...@@ -63,9 +61,7 @@ ...@@ -63,9 +61,7 @@
(match_operand:SI 0 "arm_general_register_operand" "")) (match_operand:SI 0 "arm_general_register_operand" ""))
(set (match_operand:SI 3 "memory_operand" "") (set (match_operand:SI 3 "memory_operand" "")
(match_operand:SI 1 "arm_general_register_operand" ""))] (match_operand:SI 1 "arm_general_register_operand" ""))]
"TARGET_LDRD "TARGET_LDRD"
&& current_tune->prefer_ldrd_strd
&& !optimize_function_for_size_p (cfun)"
[(const_int 0)] [(const_int 0)]
{ {
if (!gen_operands_ldrd_strd (operands, false, false, false)) if (!gen_operands_ldrd_strd (operands, false, false, false))
...@@ -102,9 +98,7 @@ ...@@ -102,9 +98,7 @@
(match_operand:SI 5 "const_int_operand" "")) (match_operand:SI 5 "const_int_operand" ""))
(set (match_operand:SI 3 "memory_operand" "") (set (match_operand:SI 3 "memory_operand" "")
(match_dup 1))] (match_dup 1))]
"TARGET_LDRD "TARGET_LDRD"
&& current_tune->prefer_ldrd_strd
&& !optimize_function_for_size_p (cfun)"
[(const_int 0)] [(const_int 0)]
{ {
if (!gen_operands_ldrd_strd (operands, false, true, false)) if (!gen_operands_ldrd_strd (operands, false, true, false))
...@@ -147,10 +141,8 @@ ...@@ -147,10 +141,8 @@
(match_dup 0)) (match_dup 0))
(set (match_operand:SI 3 "memory_operand" "") (set (match_operand:SI 3 "memory_operand" "")
(match_dup 1))] (match_dup 1))]
"TARGET_LDRD "TARGET_LDRD"
&& current_tune->prefer_ldrd_strd [(const_int 0)]
&& !optimize_function_for_size_p (cfun)"
[(const_int 0)]
{ {
if (!gen_operands_ldrd_strd (operands, false, true, false)) if (!gen_operands_ldrd_strd (operands, false, true, false))
FAIL; FAIL;
...@@ -197,8 +189,6 @@ ...@@ -197,8 +189,6 @@
[(match_operand 6 "arm_general_register_operand" "") [(match_operand 6 "arm_general_register_operand" "")
(match_operand 7 "arm_general_register_operand" "") ]))] (match_operand 7 "arm_general_register_operand" "") ]))]
"TARGET_LDRD && TARGET_ARM "TARGET_LDRD && TARGET_ARM
&& current_tune->prefer_ldrd_strd
&& !optimize_function_for_size_p (cfun)
&& ( ((rtx_equal_p(operands[0], operands[6])) && (rtx_equal_p(operands[1], operands[7]))) && ( ((rtx_equal_p(operands[0], operands[6])) && (rtx_equal_p(operands[1], operands[7])))
||((rtx_equal_p(operands[0], operands[7])) && (rtx_equal_p(operands[1], operands[6])))) ||((rtx_equal_p(operands[0], operands[7])) && (rtx_equal_p(operands[1], operands[6]))))
&& (peep2_reg_dead_p (3, operands[0]) || rtx_equal_p (operands[0], operands[4])) && (peep2_reg_dead_p (3, operands[0]) || rtx_equal_p (operands[0], operands[4]))
...@@ -231,8 +221,6 @@ ...@@ -231,8 +221,6 @@
(match_operand 7 "arm_general_register_operand" "") ])) (match_operand 7 "arm_general_register_operand" "") ]))
(clobber (reg:CC CC_REGNUM))])] (clobber (reg:CC CC_REGNUM))])]
"TARGET_LDRD && TARGET_ARM "TARGET_LDRD && TARGET_ARM
&& current_tune->prefer_ldrd_strd
&& !optimize_function_for_size_p (cfun)
&& ( ((rtx_equal_p(operands[0], operands[6])) && (rtx_equal_p(operands[1], operands[7]))) && ( ((rtx_equal_p(operands[0], operands[6])) && (rtx_equal_p(operands[1], operands[7])))
||((rtx_equal_p(operands[0], operands[7])) && (rtx_equal_p(operands[1], operands[6])))) ||((rtx_equal_p(operands[0], operands[7])) && (rtx_equal_p(operands[1], operands[6]))))
&& (peep2_reg_dead_p (3, operands[0]) || rtx_equal_p (operands[0], operands[4])) && (peep2_reg_dead_p (3, operands[0]) || rtx_equal_p (operands[0], operands[4]))
......
2016-11-17 Bernd Edlinger <bernd.edlinger@hotmail.de>
PR target/77308
* gcc.target/arm/pr53447-5.c: New test.
* lib/target-supports.exp
(check_effective_target_arm_prefer_ldrd_strd): Adjust.
2016-11-17 Claudiu Zissulescu <claziss@synopsys.com> 2016-11-17 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/abitest.S: New file. * gcc.target/arc/abitest.S: New file.
......
/* { dg-do compile } */
/* { dg-options "-Os -mthumb" } */
/* { dg-require-effective-target arm_thumb2_ok } */
void foo(long long* p)
{
p[1] |= 0x100000001;
p[2] &= 0x100000001;
p[3] ^= 0x100000001;
p[4] += 0x100000001;
p[5] -= 0x100000001;
p[6] = ~p[6];
p[7] <<= 5;
p[8] >>= 5;
p[9] -= p[10];
}
/* { dg-final { scan-assembler-times "ldrd" 10 } } */
/* { dg-final { scan-assembler-times "strd" 9 } } */
...@@ -4356,7 +4356,7 @@ proc check_effective_target_arm_prefer_ldrd_strd { } { ...@@ -4356,7 +4356,7 @@ proc check_effective_target_arm_prefer_ldrd_strd { } {
} }
return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly { return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
void foo (int *p) { p[0] = 1; p[1] = 0;} void foo (void) { __asm__ ("" ::: "r4", "r5"); }
} "-O2 -mthumb" ] } "-O2 -mthumb" ]
} }
......
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