Commit 2ef6611e by Oleg Endo

sh-protos.h (prepare_move_operands): Return void instead of int.

	* config/sh/sh-protos.h (prepare_move_operands): Return void
	instead of int.
	* config/sh/sh.c (prepare_move_operands): Likewise.
	* config/sh/sh.md: Remove return value checks of prepare_move_operands.

From-SVN: r186211
parent df4f5d5f
2012-04-07 Oleg Endo <olegendo@gcc.gnu.org> 2012-04-07 Oleg Endo <olegendo@gcc.gnu.org>
* config/sh/sh-protos.h (prepare_move_operands): Return void
instead of int.
* config/sh/sh.c (prepare_move_operands): Likewise.
* config/sh/sh.md: Remove return value checks of prepare_move_operands.
2012-04-07 Oleg Endo <olegendo@gcc.gnu.org>
* config/sh/sh-protos.h (fp_int_operand, symbol_ref_operand, * config/sh/sh-protos.h (fp_int_operand, symbol_ref_operand,
general_movsrc_operand, general_movdst_operand, arith_reg_operand, general_movsrc_operand, general_movdst_operand, arith_reg_operand,
fp_arith_reg_operand, arith_operand, arith_reg_or_0_operand, fp_arith_reg_operand, arith_operand, arith_reg_or_0_operand,
......
...@@ -64,7 +64,7 @@ extern void emit_sf_insn (rtx); ...@@ -64,7 +64,7 @@ extern void emit_sf_insn (rtx);
extern void emit_df_insn (rtx); extern void emit_df_insn (rtx);
extern void output_pic_addr_const (FILE *, rtx); extern void output_pic_addr_const (FILE *, rtx);
extern bool expand_block_move (rtx *); extern bool expand_block_move (rtx *);
extern int prepare_move_operands (rtx[], enum machine_mode mode); extern void prepare_move_operands (rtx[], enum machine_mode mode);
extern enum rtx_code prepare_cbranch_operands (rtx *, enum machine_mode mode, extern enum rtx_code prepare_cbranch_operands (rtx *, enum machine_mode mode,
enum rtx_code comparison); enum rtx_code comparison);
extern void expand_cbranchsi4 (rtx *operands, enum rtx_code comparison, int); extern void expand_cbranchsi4 (rtx *operands, enum rtx_code comparison, int);
......
...@@ -1601,7 +1601,7 @@ expand_block_move (rtx *operands) ...@@ -1601,7 +1601,7 @@ expand_block_move (rtx *operands)
/* Prepare operands for a move define_expand; specifically, one of the /* Prepare operands for a move define_expand; specifically, one of the
operands must be in a register. */ operands must be in a register. */
int void
prepare_move_operands (rtx operands[], enum machine_mode mode) prepare_move_operands (rtx operands[], enum machine_mode mode)
{ {
if ((mode == SImode || mode == DImode) if ((mode == SImode || mode == DImode)
...@@ -1763,8 +1763,6 @@ prepare_move_operands (rtx operands[], enum machine_mode mode) ...@@ -1763,8 +1763,6 @@ prepare_move_operands (rtx operands[], enum machine_mode mode)
operands[1] = op1; operands[1] = op1;
} }
} }
return 0;
} }
enum rtx_code enum rtx_code
......
...@@ -5337,8 +5337,7 @@ label: ...@@ -5337,8 +5337,7 @@ label:
(match_operand:SI 1 "general_movsrc_operand" ""))] (match_operand:SI 1 "general_movsrc_operand" ""))]
"" ""
{ {
if (prepare_move_operands (operands, SImode)) prepare_move_operands (operands, SImode);
DONE;
}) })
(define_expand "ic_invalidate_line" (define_expand "ic_invalidate_line"
...@@ -5447,8 +5446,7 @@ label: ...@@ -5447,8 +5446,7 @@ label:
(match_operand:QI 1 "general_operand" ""))] (match_operand:QI 1 "general_operand" ""))]
"" ""
{ {
if (prepare_move_operands (operands, QImode)) prepare_move_operands (operands, QImode);
DONE;
}) })
;; If movqi_reg_reg is specified as an alternative of movqi, movqi will be ;; If movqi_reg_reg is specified as an alternative of movqi, movqi will be
...@@ -5614,8 +5612,7 @@ label: ...@@ -5614,8 +5612,7 @@ label:
(match_operand:HI 1 "general_movsrc_operand" ""))] (match_operand:HI 1 "general_movsrc_operand" ""))]
"" ""
{ {
if (prepare_move_operands (operands, HImode)) prepare_move_operands (operands, HImode);
DONE;
}) })
(define_expand "reload_inhi" (define_expand "reload_inhi"
...@@ -5982,8 +5979,7 @@ label: ...@@ -5982,8 +5979,7 @@ label:
(match_operand:DI 1 "general_movsrc_operand" ""))] (match_operand:DI 1 "general_movsrc_operand" ""))]
"" ""
{ {
if (prepare_move_operands (operands, DImode)) prepare_move_operands (operands, DImode);
DONE;
}) })
(define_insn "movdf_media" (define_insn "movdf_media"
...@@ -6571,8 +6567,7 @@ label: ...@@ -6571,8 +6567,7 @@ label:
(match_operand:DF 1 "general_movsrc_operand" ""))] (match_operand:DF 1 "general_movsrc_operand" ""))]
"" ""
{ {
if (prepare_move_operands (operands, DFmode)) prepare_move_operands (operands, DFmode);
DONE;
if (TARGET_SHMEDIA) if (TARGET_SHMEDIA)
{ {
if (TARGET_SHMEDIA_FPU) if (TARGET_SHMEDIA_FPU)
...@@ -6618,8 +6613,7 @@ label: ...@@ -6618,8 +6613,7 @@ label:
(match_operand:V2SF 1 "nonimmediate_operand" ""))] (match_operand:V2SF 1 "nonimmediate_operand" ""))]
"TARGET_SHMEDIA_FPU" "TARGET_SHMEDIA_FPU"
{ {
if (prepare_move_operands (operands, V2SFmode)) prepare_move_operands (operands, V2SFmode);
DONE;
}) })
(define_expand "addv2sf3" (define_expand "addv2sf3"
...@@ -6700,8 +6694,7 @@ label: ...@@ -6700,8 +6694,7 @@ label:
(match_operand:V4SF 1 "general_operand" ""))] (match_operand:V4SF 1 "general_operand" ""))]
"TARGET_SHMEDIA_FPU" "TARGET_SHMEDIA_FPU"
{ {
if (prepare_move_operands (operands, V4SFmode)) prepare_move_operands (operands, V4SFmode);
DONE;
}) })
(define_insn_and_split "*movv16sf_i" (define_insn_and_split "*movv16sf_i"
...@@ -6748,8 +6741,7 @@ label: ...@@ -6748,8 +6741,7 @@ label:
(match_operand:V16SF 1 "nonimmediate_operand" "f,m,f"))] (match_operand:V16SF 1 "nonimmediate_operand" "f,m,f"))]
"TARGET_SHMEDIA_FPU" "TARGET_SHMEDIA_FPU"
{ {
if (prepare_move_operands (operands, V16SFmode)) prepare_move_operands (operands, V16SFmode);
DONE;
}) })
(define_insn "movsf_media" (define_insn "movsf_media"
...@@ -6921,8 +6913,7 @@ label: ...@@ -6921,8 +6913,7 @@ label:
(match_operand:SF 1 "general_movsrc_operand" ""))] (match_operand:SF 1 "general_movsrc_operand" ""))]
"" ""
{ {
if (prepare_move_operands (operands, SFmode)) prepare_move_operands (operands, SFmode);
DONE;
if (TARGET_SHMEDIA) if (TARGET_SHMEDIA)
{ {
if (TARGET_SHMEDIA_FPU) if (TARGET_SHMEDIA_FPU)
...@@ -11774,8 +11765,7 @@ label: ...@@ -11774,8 +11765,7 @@ label:
(match_operand:V8QI 1 "general_movsrc_operand" ""))] (match_operand:V8QI 1 "general_movsrc_operand" ""))]
"TARGET_SHMEDIA" "TARGET_SHMEDIA"
{ {
if (prepare_move_operands (operands, V8QImode)) prepare_move_operands (operands, V8QImode);
DONE;
}) })
(define_insn "movv8qi_i" (define_insn "movv8qi_i"
...@@ -11867,8 +11857,7 @@ label: ...@@ -11867,8 +11857,7 @@ label:
(match_operand:V2HI 1 "general_movsrc_operand" ""))] (match_operand:V2HI 1 "general_movsrc_operand" ""))]
"TARGET_SHMEDIA" "TARGET_SHMEDIA"
{ {
if (prepare_move_operands (operands, V2HImode)) prepare_move_operands (operands, V2HImode);
DONE;
}) })
(define_insn "movv2hi_i" (define_insn "movv2hi_i"
...@@ -11895,8 +11884,7 @@ label: ...@@ -11895,8 +11884,7 @@ label:
(match_operand:V4HI 1 "general_movsrc_operand" ""))] (match_operand:V4HI 1 "general_movsrc_operand" ""))]
"TARGET_SHMEDIA" "TARGET_SHMEDIA"
{ {
if (prepare_move_operands (operands, V4HImode)) prepare_move_operands (operands, V4HImode);
DONE;
}) })
(define_insn "movv4hi_i" (define_insn "movv4hi_i"
...@@ -11920,8 +11908,7 @@ label: ...@@ -11920,8 +11908,7 @@ label:
(match_operand:V2SI 1 "general_movsrc_operand" ""))] (match_operand:V2SI 1 "general_movsrc_operand" ""))]
"TARGET_SHMEDIA" "TARGET_SHMEDIA"
{ {
if (prepare_move_operands (operands, V2SImode)) prepare_move_operands (operands, V2SImode);
DONE;
}) })
(define_insn "movv2si_i" (define_insn "movv2si_i"
......
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