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riscv-gcc-1
Commit 2e7bfcec by Michael Meissner
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Fix comment 

From-SVN: r1704
parent 84b18070
Showing with 2 additions and 2 deletions
gcc/config/mips/mips.h
......@@ -1301,8 +1301,8 @@ enum reg_class
{ 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \
{ 0xffffffff, 0x00000000, 0x00000000 }, /* integer registers */ \
{ 0x00000000, 0xffffffff, 0x00000000 }, /* floating registers*/ \
{ 0x00000000, 0x00000000, 0x00000001 }, /* lo register */ \
{ 0x00000000, 0x00000000, 0x00000002 }, /* hi register */ \
{ 0x00000000, 0x00000000, 0x00000001 }, /* hi register */ \
{ 0x00000000, 0x00000000, 0x00000002 }, /* lo register */ \
{ 0x00000000, 0x00000000, 0x00000003 }, /* mul/div registers */ \
{ 0x00000000, 0x00000000, 0x00000004 }, /* status registers */ \
{ 0xffffffff, 0xffffffff, 0x00000007 } /* all registers */ \
......
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