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lvzhengyang
riscv-gcc-1
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2d1a0c68
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2d1a0c68
authored
Aug 26, 2015
by
Michael Meissner
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From-SVN: r227231
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@@ -73,7 +73,6 @@
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@@ -73,7 +73,6 @@
(float<SDI:mode><IFKF:mode>2): Likewise.
(float<SDI:mode><IFKF:mode>2): Likewise.
(floatuns<SDI:mode><IFKF:mode>2): Likewise.
(floatuns<SDI:mode><IFKF:mode>2): Likewise.
2015-08-26 Renlin Li <renlin.li@arm.com>
2015-08-26 Renlin Li <renlin.li@arm.com>
* config/aarch64/aarch64.md (*aarch64_bfi<GPI:mode><ALLX:mode>4): New.
* config/aarch64/aarch64.md (*aarch64_bfi<GPI:mode><ALLX:mode>4): New.
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