Split i386.c.

2019-05-06  Martin Liska  <mliska@suse.cz>

	* config/i386/i386-builtins.c: New file.
	* config/i386/i386-builtins.h: New file.
	* config/i386/i386-expand.c: New file.
	* config/i386/i386-expand.h: New file.
	* config/i386/i386-features.c: New file.
	* config/i386/i386-features.h: New file.
	* config/i386/i386-options.c: New file.
	* config/i386/i386-options.h: New file.
	* config.gcc: Add new files into extra_objs and
	target_gtfiles.
	* config/i386/i386.c: Split content of the file
	into newly introduced files.
	* config/i386/i386.h: Declare common variables
	and macros.
	* config/i386/t-i386: Define dependencies for new files.

From-SVN: r270895

gcc/ChangeLog

+2019-05-06  Martin Liska  <mliska@suse.cz>
+
+	* config/i386/i386-builtins.c: New file.
+	* config/i386/i386-builtins.h: New file.
+	* config/i386/i386-expand.c: New file.
+	* config/i386/i386-expand.h: New file.
+	* config/i386/i386-features.c: New file.
+	* config/i386/i386-features.h: New file.
+	* config/i386/i386-options.c: New file.
+	* config/i386/i386-options.h: New file.
+	* config.gcc: Add new files into extra_objs and
+	target_gtfiles.
+	* config/i386/i386.c: Split content of the file
+	into newly introduced files.
+	* config/i386/i386.h: Declare common variables
+	and macros.
+	* config/i386/t-i386: Define dependencies for new files.
+
 2019-05-06  Li Jia He  <helijia@linux.ibm.com>
 
 	* tree-ssa-phiopt.c (two_value_replacement): Fix a typo in parameter

gcc/config.gcc

@@ -382,7 +382,8 @@ i[34567]86-*-*)
 	c_target_objs="i386-c.o"
 	cxx_target_objs="i386-c.o"
 	d_target_objs="i386-d.o"
-	extra_objs="x86-tune-sched.o x86-tune-sched-bd.o x86-tune-sched-atom.o x86-tune-sched-core.o"
+	extra_objs="x86-tune-sched.o x86-tune-sched-bd.o x86-tune-sched-atom.o x86-tune-sched-core.o i386-options.o i386-builtins.o i386-expand.o i386-features.o"
+  target_gtfiles="\$(srcdir)/config/i386/i386-builtins.c \$(srcdir)/config/i386/i386-expand.c \$(srcdir)/config/i386/i386-options.c"
 	extra_options="${extra_options} fused-madd.opt"
 	extra_headers="cpuid.h mmintrin.h mm3dnow.h xmmintrin.h emmintrin.h
 		       pmmintrin.h tmmintrin.h ammintrin.h smmintrin.h
@@ -414,7 +415,8 @@ x86_64-*-*)
 	cxx_target_objs="i386-c.o"
 	d_target_objs="i386-d.o"
 	extra_options="${extra_options} fused-madd.opt"
-	extra_objs="x86-tune-sched.o x86-tune-sched-bd.o x86-tune-sched-atom.o x86-tune-sched-core.o"
+	extra_objs="x86-tune-sched.o x86-tune-sched-bd.o x86-tune-sched-atom.o x86-tune-sched-core.o i386-options.o i386-builtins.o i386-expand.o i386-features.o"
+  target_gtfiles="\$(srcdir)/config/i386/i386-builtins.c \$(srcdir)/config/i386/i386-expand.c \$(srcdir)/config/i386/i386-options.c"
 	extra_headers="cpuid.h mmintrin.h mm3dnow.h xmmintrin.h emmintrin.h
 		       pmmintrin.h tmmintrin.h ammintrin.h smmintrin.h
 		       nmmintrin.h bmmintrin.h fma4intrin.h wmmintrin.h

gcc/config/i386/i386-expand.h

+/* Copyright (C) 1988-2019 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_I386_EXPAND_H
+#define GCC_I386_EXPAND_H
+
+/* AVX512F does support 64-byte integer vector operations,
+   thus the longest vector we are faced with is V64QImode.  */
+#define MAX_VECT_LEN	64
+
+struct expand_vec_perm_d
+{
+  rtx target, op0, op1;
+  unsigned char perm[MAX_VECT_LEN];
+  machine_mode vmode;
+  unsigned char nelt;
+  bool one_operand_p;
+  bool testing_p;
+};
+
+rtx legitimize_tls_address (rtx x, enum tls_model model, bool for_mov);
+alias_set_type ix86_GOT_alias_set (void);
+rtx legitimize_pic_address (rtx orig, rtx reg);
+rtx legitimize_pe_coff_symbol (rtx addr, bool inreg);
+
+bool insn_defines_reg (unsigned int regno1, unsigned int regno2,
+		       rtx_insn *insn);
+void ix86_emit_binop (enum rtx_code code, machine_mode mode, rtx dst, rtx src);
+enum calling_abi ix86_function_abi (const_tree fndecl);
+bool ix86_function_ms_hook_prologue (const_tree fn);
+void warn_once_call_ms2sysv_xlogues (const char *feature);
+rtx gen_push (rtx arg);
+rtx gen_pop (rtx arg);
+rtx ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
+			 machine_mode mode, int ignore);
+bool ix86_vectorize_vec_perm_const (machine_mode vmode, rtx target, rtx op0,
+				    rtx op1, const vec_perm_indices &sel);
+bool ix86_notrack_prefixed_insn_p (rtx insn);
+machine_mode ix86_split_reduction (machine_mode mode);
+void ix86_expand_divmod_libfunc (rtx libfunc, machine_mode mode, rtx op0,
+				 rtx op1, rtx *quot_p, rtx *rem_p);
+
+#endif  /* GCC_I386_EXPAND_H */

gcc/config/i386/i386-features.h

+/* Copyright (C) 1988-2019 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_I386_FEATURES_H
+#define GCC_I386_FEATURES_H
+
+enum xlogue_stub {
+  XLOGUE_STUB_SAVE,
+  XLOGUE_STUB_RESTORE,
+  XLOGUE_STUB_RESTORE_TAIL,
+  XLOGUE_STUB_SAVE_HFP,
+  XLOGUE_STUB_RESTORE_HFP,
+  XLOGUE_STUB_RESTORE_HFP_TAIL,
+
+  XLOGUE_STUB_COUNT
+};
+
+enum xlogue_stub_sets {
+  XLOGUE_SET_ALIGNED,
+  XLOGUE_SET_ALIGNED_PLUS_8,
+  XLOGUE_SET_HFP_ALIGNED_OR_REALIGN,
+  XLOGUE_SET_HFP_ALIGNED_PLUS_8,
+
+  XLOGUE_SET_COUNT
+};
+
+/* Register save/restore layout used by out-of-line stubs.  */
+class xlogue_layout {
+public:
+  struct reginfo
+  {
+    unsigned regno;
+    HOST_WIDE_INT offset;	/* Offset used by stub base pointer (rax or
+				   rsi) to where each register is stored.  */
+  };
+
+  unsigned get_nregs () const			{return m_nregs;}
+  HOST_WIDE_INT get_stack_align_off_in () const	{return m_stack_align_off_in;}
+
+  const reginfo &get_reginfo (unsigned reg) const
+  {
+    gcc_assert (reg < m_nregs);
+    return m_regs[reg];
+  }
+
+  static const char *get_stub_name (enum xlogue_stub stub,
+				    unsigned n_extra_args);
+
+  /* Returns an rtx for the stub's symbol based upon
+       1.) the specified stub (save, restore or restore_ret) and
+       2.) the value of cfun->machine->call_ms2sysv_extra_regs and
+       3.) rather or not stack alignment is being performed.  */
+  static rtx get_stub_rtx (enum xlogue_stub stub);
+
+  /* Returns the amount of stack space (including padding) that the stub
+     needs to store registers based upon data in the machine_function.  */
+  HOST_WIDE_INT get_stack_space_used () const
+  {
+    const struct machine_function *m = cfun->machine;
+    unsigned last_reg = m->call_ms2sysv_extra_regs + MIN_REGS - 1;
+
+    gcc_assert (m->call_ms2sysv_extra_regs <= MAX_EXTRA_REGS);
+    return m_regs[last_reg].offset + STUB_INDEX_OFFSET;
+  }
+
+  /* Returns the offset for the base pointer used by the stub.  */
+  HOST_WIDE_INT get_stub_ptr_offset () const
+  {
+    return STUB_INDEX_OFFSET + m_stack_align_off_in;
+  }
+
+  static const struct xlogue_layout &get_instance ();
+  static unsigned count_stub_managed_regs ();
+  static bool is_stub_managed_reg (unsigned regno, unsigned count);
+
+  static const HOST_WIDE_INT STUB_INDEX_OFFSET = 0x70;
+  static const unsigned MIN_REGS = NUM_X86_64_MS_CLOBBERED_REGS;
+  static const unsigned MAX_REGS = 18;
+  static const unsigned MAX_EXTRA_REGS = MAX_REGS - MIN_REGS;
+  static const unsigned VARIANT_COUNT = MAX_EXTRA_REGS + 1;
+  static const unsigned STUB_NAME_MAX_LEN = 20;
+  static const char * const STUB_BASE_NAMES[XLOGUE_STUB_COUNT];
+  static const unsigned REG_ORDER[MAX_REGS];
+  static const unsigned REG_ORDER_REALIGN[MAX_REGS];
+
+private:
+  xlogue_layout ();
+  xlogue_layout (HOST_WIDE_INT stack_align_off_in, bool hfp);
+  xlogue_layout (const xlogue_layout &);
+
+  /* True if hard frame pointer is used.  */
+  bool m_hfp;
+
+  /* Max number of register this layout manages.  */
+  unsigned m_nregs;
+
+  /* Incoming offset from 16-byte alignment.  */
+  HOST_WIDE_INT m_stack_align_off_in;
+
+  /* Register order and offsets.  */
+  struct reginfo m_regs[MAX_REGS];
+
+  /* Lazy-inited cache of symbol names for stubs.  */
+  static char s_stub_names[2][XLOGUE_STUB_COUNT][VARIANT_COUNT]
+			  [STUB_NAME_MAX_LEN];
+
+  static const xlogue_layout s_instances[XLOGUE_SET_COUNT];
+};
+
+namespace {
+
+class scalar_chain
+{
+ public:
+  scalar_chain ();
+  virtual ~scalar_chain ();
+
+  static unsigned max_id;
+
+  /* ID of a chain.  */
+  unsigned int chain_id;
+  /* A queue of instructions to be included into a chain.  */
+  bitmap queue;
+  /* Instructions included into a chain.  */
+  bitmap insns;
+  /* All registers defined by a chain.  */
+  bitmap defs;
+  /* Registers used in both vector and sclar modes.  */
+  bitmap defs_conv;
+
+  void build (bitmap candidates, unsigned insn_uid);
+  virtual int compute_convert_gain () = 0;
+  int convert ();
+
+ protected:
+  void add_to_queue (unsigned insn_uid);
+  void emit_conversion_insns (rtx insns, rtx_insn *pos);
+
+ private:
+  void add_insn (bitmap candidates, unsigned insn_uid);
+  void analyze_register_chain (bitmap candidates, df_ref ref);
+  virtual void mark_dual_mode_def (df_ref def) = 0;
+  virtual void convert_insn (rtx_insn *insn) = 0;
+  virtual void convert_registers () = 0;
+};
+
+class dimode_scalar_chain : public scalar_chain
+{
+ public:
+  int compute_convert_gain ();
+ private:
+  void mark_dual_mode_def (df_ref def);
+  rtx replace_with_subreg (rtx x, rtx reg, rtx subreg);
+  void replace_with_subreg_in_insn (rtx_insn *insn, rtx reg, rtx subreg);
+  void convert_insn (rtx_insn *insn);
+  void convert_op (rtx *op, rtx_insn *insn);
+  void convert_reg (unsigned regno);
+  void make_vector_copies (unsigned regno);
+  void convert_registers ();
+  int vector_const_cost (rtx exp);
+};
+
+class timode_scalar_chain : public scalar_chain
+{
+ public:
+  /* Convert from TImode to V1TImode is always faster.  */
+  int compute_convert_gain () { return 1; }
+
+ private:
+  void mark_dual_mode_def (df_ref def);
+  void fix_debug_reg_uses (rtx reg);
+  void convert_insn (rtx_insn *insn);
+  /* We don't convert registers to difference size.  */
+  void convert_registers () {}
+};
+
+} // anon namespace
+
+bool ix86_save_reg (unsigned int regno, bool maybe_eh_return, bool ignore_outlined);
+int ix86_compare_version_priority (tree decl1, tree decl2);
+tree ix86_generate_version_dispatcher_body (void *node_p);
+tree ix86_get_function_versions_dispatcher (void *decl);
+tree ix86_mangle_decl_assembler_name (tree decl, tree id);
+
+
+#endif  /* GCC_I386_FEATURES_H */

gcc/config/i386/i386-options.h

+/* Copyright (C) 1988-2019 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef GCC_I386_OPTIONS_H
+#define GCC_I386_OPTIONS_H
+
+char *ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
+			  int flags, int flags2,
+			  const char *arch, const char *tune,
+			  enum fpmath_unit fpmath, bool add_nl_p,
+			  bool add_abi_p);
+
+extern enum attr_cpu ix86_schedule;
+
+extern enum processor_type ix86_tune;
+extern enum processor_type ix86_arch;
+extern unsigned char x86_prefetch_sse;
+extern const struct processor_costs *ix86_tune_cost;
+
+extern int ix86_tune_defaulted;
+extern int ix86_arch_specified;
+
+extern unsigned int ix86_default_incoming_stack_boundary;
+extern HOST_WIDE_INT deferred_isa_values;
+extern HOST_WIDE_INT deferred_isa_values2;
+
+extern unsigned int ix86_preferred_stack_boundary;
+extern unsigned int ix86_user_incoming_stack_boundary;
+extern unsigned int ix86_default_incoming_stack_boundary;
+extern unsigned int ix86_incoming_stack_boundary;
+
+extern char *ix86_offload_options (void);
+extern void ix86_option_override (void);
+extern void ix86_override_options_after_change (void);
+void ix86_set_current_function (tree fndecl);
+bool ix86_function_naked (const_tree fn);
+void ix86_simd_clone_adjust (struct cgraph_node *node);
+
+extern tree (*ix86_veclib_handler) (combined_fn, tree, tree);
+extern tree ix86_veclibabi_svml (combined_fn, tree, tree);
+extern tree ix86_veclibabi_acml (combined_fn, tree, tree);
+
+extern rtx (*ix86_gen_leave) (void);
+extern rtx (*ix86_gen_add3) (rtx, rtx, rtx);
+extern rtx (*ix86_gen_sub3) (rtx, rtx, rtx);
+extern rtx (*ix86_gen_sub3_carry) (rtx, rtx, rtx, rtx, rtx);
+extern rtx (*ix86_gen_one_cmpl2) (rtx, rtx);
+extern rtx (*ix86_gen_monitor) (rtx, rtx, rtx);
+extern rtx (*ix86_gen_monitorx) (rtx, rtx, rtx);
+extern rtx (*ix86_gen_clzero) (rtx);
+extern rtx (*ix86_gen_andsp) (rtx, rtx, rtx);
+extern rtx (*ix86_gen_allocate_stack_worker) (rtx, rtx);
+extern rtx (*ix86_gen_adjust_stack_and_probe) (rtx, rtx, rtx);
+extern rtx (*ix86_gen_probe_stack_range) (rtx, rtx, rtx);
+extern rtx (*ix86_gen_tls_global_dynamic_64) (rtx, rtx, rtx);
+extern rtx (*ix86_gen_tls_local_dynamic_base_64) (rtx, rtx);
+
+enum ix86_function_specific_strings
+{
+  IX86_FUNCTION_SPECIFIC_ARCH,
+  IX86_FUNCTION_SPECIFIC_TUNE,
+  IX86_FUNCTION_SPECIFIC_MAX
+};
+
+extern const char *stringop_alg_names[];
+
+void ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2);
+void ix86_function_specific_save (struct cl_target_option *,
+				  struct gcc_options *opts);
+void ix86_function_specific_restore (struct gcc_options *opts,
+				     struct cl_target_option *);
+void ix86_function_specific_post_stream_in (struct cl_target_option *);
+void ix86_function_specific_print (FILE *, int,
+				   struct cl_target_option *);
+bool ix86_valid_target_attribute_p (tree, tree, tree, int);
+
+extern const struct attribute_spec ix86_attribute_table[];
+
+
+#endif  /* GCC_I386_OPTIONS_H */

gcc/config/i386/i386.h

@@ -2759,6 +2759,9 @@ struct GTY(()) machine_function {
   /* During SEH output, this is non-null.  */
   struct seh_frame_state * GTY((skip(""))) seh;
 };
+
+extern GTY(()) tree sysv_va_list_type_node;
+extern GTY(()) tree ms_va_list_type_node;
 #endif
 
 #define ix86_stack_locals (cfun->machine->stack_locals)
@@ -2856,6 +2859,12 @@ extern void debug_dispatch_window (int);
 
 #define TARGET_SUPPORTS_WIDE_INT 1
 
+#if !defined(GENERATOR_FILE) && !defined(IN_LIBGCC2)
+extern enum attr_cpu ix86_schedule;
+
+#define NUM_X86_64_MS_CLOBBERED_REGS 12
+#endif
+
 /*
 Local variables:
 version-control: t

gcc/config/i386/t-i386

@@ -44,6 +44,22 @@ i386-d.o: $(srcdir)/config/i386/i386-d.c
 	$(COMPILE) $<
 	$(POSTCOMPILE)
 
+i386-options.o: $(srcdir)/config/i386/i386-options.c
+	$(COMPILE) $<
+	$(POSTCOMPILE)
+
+i386-builtins.o: $(srcdir)/config/i386/i386-builtins.c
+	$(COMPILE) $<
+	$(POSTCOMPILE)
+
+i386-expand.o: $(srcdir)/config/i386/i386-expand.c
+	$(COMPILE) $<
+	$(POSTCOMPILE)
+
+i386-features.o: $(srcdir)/config/i386/i386-features.c
+	$(COMPILE) $<
+	$(POSTCOMPILE)
+
 i386.o: i386-builtin-types.inc
 
 i386-builtin-types.inc: s-i386-bt ; @true