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riscv-gcc-1
Commit 2bee0449 by Richard Kenner
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(extendqidi2, extendqisi2, extendqihi2): Remove non-existent lba instruction. 

(ashrdi3): Undo previous change.

From-SVN: r7397
parent 7efad3f7
Showing with 17 additions and 37 deletions
gcc/config/rs6000/rs6000.md
...@@ -287,20 +287,11 @@ ...@@ -287,20 +287,11 @@
"rldicl. %0,%1,0,56" "rldicl. %0,%1,0,56"
[(set_attr "type" "compare")]) [(set_attr "type" "compare")])
(define_expand "extendqidi2" (define_insn "extendqidi2"
[(set (match_operand:DI 0 "gpc_reg_operand" "") [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(sign_extend:DI (match_operand:QI 1 "gpc_reg_operand" "")))] (sign_extend:DI (match_operand:QI 1 "gpc_reg_operand" "r")))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"") "extsb %0,%1")
(define_insn ""
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(sign_extend:DI (match_operand:QI 1 "reg_or_mem_operand" "m,r")))]
"TARGET_POWERPC64"
"@
lba%U1%X1 %0,%1
extsb %0,%1"
[(set_attr "type" "load,*")])
(define_insn "" (define_insn ""
[(set (match_operand:CC 0 "cc_reg_operand" "=x") [(set (match_operand:CC 0 "cc_reg_operand" "=x")
...@@ -507,13 +498,10 @@ ...@@ -507,13 +498,10 @@
}") }")
(define_insn "extendqisi2_ppc" (define_insn "extendqisi2_ppc"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r") [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(sign_extend:SI (match_operand:QI 1 "reg_or_mem_operand" "m,r")))] (sign_extend:SI (match_operand:QI 1 "gpc_reg_operand" "r")))]
"TARGET_POWERPC" "TARGET_POWERPC"
"@ "extsb %0,%1")
lba%U1%X1 %0,%1
extsb %0,%1"
[(set_attr "type" "load,*")])
(define_insn "" (define_insn ""
[(set (match_operand:CC 0 "cc_reg_operand" "=x") [(set (match_operand:CC 0 "cc_reg_operand" "=x")
...@@ -610,13 +598,10 @@ ...@@ -610,13 +598,10 @@
}") }")
(define_insn "extendqihi2_ppc" (define_insn "extendqihi2_ppc"
[(set (match_operand:HI 0 "gpc_reg_operand" "=r,r") [(set (match_operand:HI 0 "gpc_reg_operand" "=r")
(sign_extend:HI (match_operand:QI 1 "reg_or_mem_operand" "m,r")))] (sign_extend:HI (match_operand:QI 1 "gpc_reg_operand" "r")))]
"TARGET_POWERPC" "TARGET_POWERPC"
"@ "extsb %0,%1")
lba%U1%X1 %0,%1
extsb %0,%1"
[(set_attr "type" "load,*")])
(define_insn "" (define_insn ""
[(set (match_operand:CC 0 "cc_reg_operand" "=x") [(set (match_operand:CC 0 "cc_reg_operand" "=x")
...@@ -3390,22 +3375,17 @@ ...@@ -3390,22 +3375,17 @@
;; just handle shifts by constants. ;; just handle shifts by constants.
(define_expand "ashrdi3" (define_expand "ashrdi3"
[(set (match_operand:DI 0 "gpc_reg_operand" "") [(parallel [(set (match_operand:DI 0 "gpc_reg_operand" "=")
(ashiftrt:DI (match_operand:DI 1 "gpc_reg_operand" "") (ashiftrt:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "reg_or_cint_operand" "")))] (match_operand:SI 2 "general_operand" "")))
"" (clobber (match_scratch:SI 3 ""))])]
"TARGET_POWER"
" "
{ { if (GET_CODE (operands[2]) != CONST_INT)
if (TARGET_POWER && GET_CODE (operands[2]) != CONST_INT)
{
emit_insn (gen_ashrdi3_power (operands[0], operands[1], operands[2]));
DONE;
}
else if (! TARGET_POWERPC64)
FAIL; FAIL;
}") }")
(define_insn "ashrdi3_power" (define_insn ""
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r") [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(ashiftrt:DI (match_operand:DI 1 "gpc_reg_operand" "r,r") (ashiftrt:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")
(match_operand:SI 2 "const_int_operand" "M,i"))) (match_operand:SI 2 "const_int_operand" "M,i")))
......
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