Commit 2b99bed8 by Andrew Stubbs Committed by Andrew Stubbs

Enable QI/HImode vector moves

2019-12-06  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md (VEC_1REG_MODE): Remove V64QI and V64HI.
	(VEC_1REG_ALT): Likewise.
	(VEC_ALL1REG_MODE): New mode iterator.
	(VEC_1REG_INT_MODE): Remove V64QI and V64HI.
	(VEC_1REG_INT_ALT): Likewise.
	(VEC_ALL1REG_INT_MODE): New mode interator.
	(VEC_ALL1REG_INT_ALT): Likewise.
	(VEC_REG_MODE): Remove V64QI and V64HI.
	(VEC_ALLREG_MODE): New mode interator.
	(vec_merge): Change to VEC_ALLREG_MODE.
	(vec_merge_with_clobber): Likewise.
	(vec_merge_with_vcc): Likewise.
	(mov<mode>): Likewise.
	(mov<mode>_unspec): Likewise.
	(*mov<mode>): Change to VEC_ALL1REG_MODE.
	(mov<mode>_exec): Likewise.
	(*mov<mode>_exec_match): Likewise.
	(mov<mode>_sgprbase): Likewise.
	(reload_in<mode>): Change to VEC_ALLREG_MODE.
	(reload_out<mode>): Likewise.
	(scalar address splits): Likewise.
	(*vec_set<mode>): Change to VEC_ALL1REG_MODE.
	(vec_set<mode>): Change to VEC_ALLREG_MODE.
	(*vec_set<mode>_1): Change to VEC_ALL1REG_MODE.
	(vec_duplicate<mode><exec>): Likewise.
	(vec_extract<mode><scalar_mode>): Likewise.
	(vec_init<mode><scalar_mode>): Change to VEC_ALLREG_MODE.
	(gather_load<mode>): Likewise.
	(gather<mode>_exec): Likewise.
	(gather<mode>_expr<exec>): Likewise.
	(gather<mode>_insn_1offset<exec>): Likewise.
	(gather<mode>_insn_1offset_ds<exec>): Likewise.
	(gather<mode>_insn_2offsets<exec>): Likewise.
	(ds_bpermute<mode>): Change to VEC_ALL1REG_MODE.
	(VEC_INT_MODE): Remove V64QI and V64HI.
	(vcond_mask_<mode>di): Change to VEC_ALLREG_MODE.
	(vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>): Change to
	VEC_ALL1REG_MODE.
	(vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Likewise.
	(vcondu<VEC_1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Likewise.
	(vcondu<VEC_1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Likewise.
	(maskload<mode>di): Change to VEC_ALL1REG_MODE.
	(maskstore<mode>di): Likewise.
	(mask_gather_load<mode>): Likewise.
	(mov_from_lane63_<mode>): Likewise.
	* config/gcn/gcn.c (gcn_vector_mode_supported_p): Renable V64QImode
	and V64HImode vectorization.
	(gcn_related_vector_mode): New function.
	(TARGET_VECTORIZE_RELATED_MODE): New define.

From-SVN: r279053
parent 2297a38e
2019-12-06 Andrew Stubbs <ams@codesourcery.com>
* config/gcn/gcn-valu.md (VEC_1REG_MODE): Remove V64QI and V64HI.
(VEC_1REG_ALT): Likewise.
(VEC_ALL1REG_MODE): New mode iterator.
(VEC_1REG_INT_MODE): Remove V64QI and V64HI.
(VEC_1REG_INT_ALT): Likewise.
(VEC_ALL1REG_INT_MODE): New mode interator.
(VEC_ALL1REG_INT_ALT): Likewise.
(VEC_REG_MODE): Remove V64QI and V64HI.
(VEC_ALLREG_MODE): New mode interator.
(vec_merge): Change to VEC_ALLREG_MODE.
(vec_merge_with_clobber): Likewise.
(vec_merge_with_vcc): Likewise.
(mov<mode>): Likewise.
(mov<mode>_unspec): Likewise.
(*mov<mode>): Change to VEC_ALL1REG_MODE.
(mov<mode>_exec): Likewise.
(*mov<mode>_exec_match): Likewise.
(mov<mode>_sgprbase): Likewise.
(reload_in<mode>): Change to VEC_ALLREG_MODE.
(reload_out<mode>): Likewise.
(scalar address splits): Likewise.
(*vec_set<mode>): Change to VEC_ALL1REG_MODE.
(vec_set<mode>): Change to VEC_ALLREG_MODE.
(*vec_set<mode>_1): Change to VEC_ALL1REG_MODE.
(vec_duplicate<mode><exec>): Likewise.
(vec_extract<mode><scalar_mode>): Likewise.
(vec_init<mode><scalar_mode>): Change to VEC_ALLREG_MODE.
(gather_load<mode>): Likewise.
(gather<mode>_exec): Likewise.
(gather<mode>_expr<exec>): Likewise.
(gather<mode>_insn_1offset<exec>): Likewise.
(gather<mode>_insn_1offset_ds<exec>): Likewise.
(gather<mode>_insn_2offsets<exec>): Likewise.
(ds_bpermute<mode>): Change to VEC_ALL1REG_MODE.
(VEC_INT_MODE): Remove V64QI and V64HI.
(vcond_mask_<mode>di): Change to VEC_ALLREG_MODE.
(vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>): Change to
VEC_ALL1REG_MODE.
(vcond<VEC_1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Likewise.
(vcondu<VEC_1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Likewise.
(vcondu<VEC_1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Likewise.
(maskload<mode>di): Change to VEC_ALL1REG_MODE.
(maskstore<mode>di): Likewise.
(mask_gather_load<mode>): Likewise.
(mov_from_lane63_<mode>): Likewise.
* config/gcn/gcn.c (gcn_vector_mode_supported_p): Renable V64QImode
and V64HImode vectorization.
(gcn_related_vector_mode): New function.
(TARGET_VECTORIZE_RELATED_MODE): New define.
2019-12-06 Tobias Burnus <tobias@codesourcery.com>
Kwok Cheung Yeung <kcy@codesourcery.com>
......@@ -3997,12 +3997,8 @@ gcn_vectorize_vec_perm_const (machine_mode vmode, rtx dst,
static bool
gcn_vector_mode_supported_p (machine_mode mode)
{
/* FIXME: Enable V64QImode and V64HImode.
We should support these modes, but vector operations are usually
assumed to automatically truncate types, and GCN does not. We
need to add explicit truncates and/or use SDWA for QI/HI insns. */
return (/* mode == V64QImode || mode == V64HImode
||*/ mode == V64SImode || mode == V64DImode
return (mode == V64QImode || mode == V64HImode
|| mode == V64SImode || mode == V64DImode
|| mode == V64SFmode || mode == V64DFmode);
}
......@@ -4032,6 +4028,25 @@ gcn_vectorize_preferred_simd_mode (scalar_mode mode)
}
}
/* Implement TARGET_VECTORIZE_RELATED_MODE.
All GCN vectors are 64-lane, so this is simpler than other architectures.
In particular, we do *not* want to match vector bit-size. */
static opt_machine_mode
gcn_related_vector_mode (machine_mode vector_mode, scalar_mode element_mode,
poly_uint64 nunits)
{
if (known_ne (nunits, 0U) && known_ne (nunits, 64U))
return VOIDmode;
machine_mode pref_mode = gcn_vectorize_preferred_simd_mode (element_mode);
if (!VECTOR_MODE_P (pref_mode))
return VOIDmode;
return pref_mode;
}
/* Implement TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT.
Returns the preferred alignment in bits for accesses to vectors of type type
......@@ -6162,6 +6177,8 @@ print_operand (FILE *file, rtx x, int code)
#undef TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT
#define TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT \
gcn_preferred_vector_alignment
#undef TARGET_VECTORIZE_RELATED_MODE
#define TARGET_VECTORIZE_RELATED_MODE gcn_related_vector_mode
#undef TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT
#define TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT \
gcn_vectorize_support_vector_misalignment
......
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