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riscv-gcc-1
Commit 2b3534a3 by Jakub Jelinek
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ChangeLog fixes.

parent f17f6127
Showing with 19 additions and 19 deletions
gcc/ChangeLog
...@@ -54,7 +54,7 @@ ...@@ -54,7 +54,7 @@
* config/arm/vfp.md: Add BFmode to movhf patterns. * config/arm/vfp.md: Add BFmode to movhf patterns.
2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/arm/arm-cpus.in (mve, mve_float): New features. * config/arm/arm-cpus.in (mve, mve_float): New features.
(dsp, mve, mve.fp): New options. (dsp, mve, mve.fp): New options.
...@@ -63,7 +63,7 @@ ...@@ -63,7 +63,7 @@
* doc/invoke.texi: Document the armv8.1-m mve and dps options. * doc/invoke.texi: Document the armv8.1-m mve and dps options.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
Armv8-M Mainline. Armv8-M Mainline.
...@@ -71,7 +71,7 @@ ...@@ -71,7 +71,7 @@
error for using -mcmse when targeting Armv8.1-M Mainline. error for using -mcmse when targeting Armv8.1-M Mainline.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.md (nonsecure_call_internal): Do not force memory * config/arm/arm.md (nonsecure_call_internal): Do not force memory
address in r4 when targeting Armv8.1-M Mainline. address in r4 when targeting Armv8.1-M Mainline.
...@@ -82,7 +82,7 @@ ...@@ -82,7 +82,7 @@
(nonsecure_call_value_reg_thumb2): Likewise. (nonsecure_call_value_reg_thumb2): Likewise.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early. * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
(cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
...@@ -96,7 +96,7 @@ ...@@ -96,7 +96,7 @@
(lazy_load_multiple_insn): Likewise. (lazy_load_multiple_insn): Likewise.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (vfp_emit_fstmd): Declare early. * config/arm/arm.c (vfp_emit_fstmd): Declare early.
(arm_emit_vfp_multi_reg_pop): Likewise. (arm_emit_vfp_multi_reg_pop): Likewise.
...@@ -105,7 +105,7 @@ ...@@ -105,7 +105,7 @@
restore callee-saved VFP registers. restore callee-saved VFP registers.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (arm_emit_multi_reg_pop): Declare early. * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
(cmse_nonsecure_call_clear_caller_saved): Rename into ... (cmse_nonsecure_call_clear_caller_saved): Rename into ...
...@@ -116,7 +116,7 @@ ...@@ -116,7 +116,7 @@
(arm_reorg): Adapt to function rename. (arm_reorg): Adapt to function rename.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-protos.h (clear_operation_p): Adapt prototype. * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
* config/arm/arm.c (clear_operation_p): Extend to be able to check a * config/arm/arm.c (clear_operation_p): Extend to be able to check a
...@@ -134,7 +134,7 @@ ...@@ -134,7 +134,7 @@
* config/arm/vfp.md (clear_vfp_multiple): New define_insn. * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-protos.h (clear_operation_p): Declare. * config/arm/arm-protos.h (clear_operation_p): Declare.
* config/arm/arm.c (clear_operation_p): New function. * config/arm/arm.c (clear_operation_p): New function.
...@@ -149,7 +149,7 @@ ...@@ -149,7 +149,7 @@
* config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec. * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.c (fp_sysreg_names): Declare and define. * config/arm/arm.c (fp_sysreg_names): Declare and define.
(use_return_insn): Also return false for Armv8.1-M Mainline. (use_return_insn): Also return false for Armv8.1-M Mainline.
...@@ -173,7 +173,7 @@ ...@@ -173,7 +173,7 @@
(pop_fpsysreg_insn): Likewise. (pop_fpsysreg_insn): Likewise.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-cpus.in (armv8_1m_main): New feature. * config/arm/arm-cpus.in (armv8_1m_main): New feature.
(ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k, (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
......
gcc/testsuite/ChangeLog
...@@ -30,12 +30,12 @@ ...@@ -30,12 +30,12 @@
* gcc.target/arm/bfloat16_simd_3_2.c: New test. * gcc.target/arm/bfloat16_simd_3_2.c: New test.
2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com>
* testsuite/gcc.target/arm/multilib.exp: Add v8.1-M entries. * testsuite/gcc.target/arm/multilib.exp: Add v8.1-M entries.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-1.c: Add check for BLXNS when instructions * gcc.target/arm/cmse/cmse-1.c: Add check for BLXNS when instructions
introduced in Armv8.1-M Mainline Security Extensions are available and introduced in Armv8.1-M Mainline Security Extensions are available and
...@@ -72,7 +72,7 @@ ...@@ -72,7 +72,7 @@
Mainline and restrict libcall count to Armv8-M. Mainline and restrict libcall count to Armv8-M.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c: Add check for VLSTM and * gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13.c: Add check for VLSTM and
VLLDM. VLLDM.
...@@ -85,7 +85,7 @@ ...@@ -85,7 +85,7 @@
* gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/softfp-sp/cmse-8.c: Likewise.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c: Add check for * gcc.target/arm/cmse/mainline/8_1m/hard-sp/cmse-13.c: Add check for
VPUSH and VPOP and update expectation for VSCCLRM. VPUSH and VPOP and update expectation for VSCCLRM.
...@@ -96,7 +96,7 @@ ...@@ -96,7 +96,7 @@
* gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/hard/cmse-8.c: Likewise.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/cmse-1.c: Add check for PUSH and POP and update * gcc.target/arm/cmse/cmse-1.c: Add check for PUSH and POP and update
CLRM check. CLRM check.
...@@ -126,7 +126,7 @@ ...@@ -126,7 +126,7 @@
* gcc.target/arm/cmse/mainline/8_1m/softfp/union-2.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/softfp/union-2.c: Likewise.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/bitfield-1.c: Add check for VSCCLRM. * gcc.target/arm/cmse/bitfield-1.c: Add check for VSCCLRM.
* gcc.target/arm/cmse/bitfield-2.c: Likewise. * gcc.target/arm/cmse/bitfield-2.c: Likewise.
...@@ -146,7 +146,7 @@ ...@@ -146,7 +146,7 @@
* gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/softfp/cmse-5.c: Likewise.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/bitfield-1.c: Add check for CLRM. * gcc.target/arm/cmse/bitfield-1.c: Add check for CLRM.
* gcc.target/arm/cmse/bitfield-2.c: Likewise. * gcc.target/arm/cmse/bitfield-2.c: Likewise.
...@@ -184,7 +184,7 @@ ...@@ -184,7 +184,7 @@
* gcc.target/arm/cmse/mainline/8_1m/union-2.c: Likewise. * gcc.target/arm/cmse/mainline/8_1m/union-2.c: Likewise.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/cmse/bitfield-1.c: add checks for VSTR and VLDR. * gcc.target/arm/cmse/bitfield-1.c: add checks for VSTR and VLDR.
* gcc.target/arm/cmse/bitfield-2.c: Likewise. * gcc.target/arm/cmse/bitfield-2.c: Likewise.
...@@ -302,7 +302,7 @@ ...@@ -302,7 +302,7 @@
New procedure. New procedure.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp * lib/target-supports.exp
(check_effective_target_arm_arch_v8_1m_main_ok): Define. (check_effective_target_arm_arch_v8_1m_main_ok): Define.
......
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