Commit 2b2a8f1f by Richard Henderson Committed by Richard Henderson

invoke.texi: Document -frename-registers.

        * invoke.texi: Document -frename-registers.  Add it to -O3.
        * toplev.c (rest_of_compilation): Run regrename before ifcvt2.
        (enum dump_file_index, dump_file): Update order.
        (main): Set flag_rename_registers at -O3.

From-SVN: r37092
parent 93c89ab3
2000-10-27 Richard Henderson <rth@redhat.com>
* invoke.texi: Document -frename-registers. Add it to -O3.
* toplev.c (rest_of_compilation): Run regrename before ifcvt2.
(enum dump_file_index, dump_file): Update order.
(main): Set flag_rename_registers at -O3.
2000-10-27 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.h (enum reg_class): Add PV_REG.
(REG_CLASS_NAMES, REG_CLASS_CONTENTS, REGNO_REG_CLASS): Update.
(REG_CLASS_FROM_LETTER): Assign it to 'c'.
......
......@@ -175,9 +175,9 @@ in the following sections.
-fmove-all-movables -fno-default-inline -fno-defer-pop
-fno-function-cse -fno-inline -fno-peephole -ftrapv
-fomit-frame-pointer -foptimize-register-moves -foptimize-sibling-calls
-fregmove -frerun-cse-after-loop -frerun-loop-opt -freduce-all-givs
-fschedule-insns -fschedule-insns2 -fssa -fstrength-reduce
-fstrict-aliasing -fthread-jumps -funroll-all-loops
-fregmove -frename-registers -frerun-cse-after-loop -frerun-loop-opt
-freduce-all-givs -fschedule-insns -fschedule-insns2 -fssa
-fstrength-reduce -fstrict-aliasing -fthread-jumps -funroll-all-loops
-funroll-loops
-O -O0 -O1 -O2 -O3 -Os
@end smallexample
......@@ -2577,14 +2577,15 @@ perform loop unrolling or function inlining when you specify @samp{-O2}.
As compared to @samp{-O}, this option increases both compilation time
and the performance of the generated code.
@samp{-O2} turns on all optional optimizations except for loop unrolling
and function inlining. It also turns on the @samp{-fforce-mem} option
on all machines and frame pointer elimination on machines where doing so
does not interfere with debugging.
@samp{-O2} turns on all optional optimizations except for loop unrolling,
function inlining, and register renaming. It also turns on the
@samp{-fforce-mem} option on all machines and frame pointer elimination
on machines where doing so does not interfere with debugging.
@item -O3
Optimize yet more. @samp{-O3} turns on all optimizations specified by
@samp{-O2} and also turns on the @samp{inline-functions} option.
@samp{-O2} and also turns on the @samp{-finline-functions} and
@samp{-frename-registers} options.
@item -O0
Do not optimize.
......@@ -2805,7 +2806,6 @@ halting the program may not work properly with this option. Use
-fno-delete-null-pointer-checks to disable this optimizing for programs
which depend on that behavior.
@item -fexpensive-optimizations
Perform a number of minor optimizations that are relatively expensive.
......@@ -3033,6 +3033,12 @@ Perform dead-code elimination in SSA form. Requires @samp{-fssa}. Like
Treat floating point constant as single precision constant instead of
implicitly converting it to double precision constant.
@item -frename-registers
Attempt to avoid false dependancies in scheduled code by making use
of registers left over after register allocation. This optimization
will most benefit processors with lots of registers. It can, however,
make debugging impossible, since variables will no longer stay in
a ``home register''.
@end table
@node Preprocessor Options
......
......@@ -277,9 +277,9 @@ enum dump_file_index
DFI_lreg,
DFI_greg,
DFI_flow2,
DFI_ce2,
DFI_peephole2,
DFI_rnreg,
DFI_ce2,
DFI_sched2,
DFI_bbro,
DFI_jump2,
......@@ -321,9 +321,9 @@ struct dump_file_info dump_file[DFI_MAX] =
{ "lreg", 'l', 1, 0, 0 },
{ "greg", 'g', 1, 0, 0 },
{ "flow2", 'w', 1, 0, 0 },
{ "ce2", 'E', 1, 0, 0 },
{ "peephole2", 'z', 1, 0, 0 },
{ "rnreg", 'n', 1, 0, 0 },
{ "ce2", 'E', 1, 0, 0 },
{ "sched2", 'R', 1, 0, 0 },
{ "bbro", 'B', 1, 0, 0 },
{ "jump2", 'J', 1, 0, 0 },
......@@ -3509,17 +3509,6 @@ rest_of_compilation (decl)
close_dump_file (DFI_flow2, print_rtl_with_bb, insns);
timevar_pop (TV_FLOW2);
if (optimize > 0)
{
timevar_push (TV_IFCVT2);
open_dump_file (DFI_ce2, decl);
if_convert (1);
close_dump_file (DFI_ce2, print_rtl_with_bb, insns);
timevar_pop (TV_IFCVT2);
}
#ifdef HAVE_peephole2
if (optimize > 0 && flag_peephole2)
{
......@@ -3544,6 +3533,17 @@ rest_of_compilation (decl)
timevar_pop (TV_RENAME_REGISTERS);
}
if (optimize > 0)
{
timevar_push (TV_IFCVT2);
open_dump_file (DFI_ce2, decl);
if_convert (1);
close_dump_file (DFI_ce2, print_rtl_with_bb, insns);
timevar_pop (TV_IFCVT2);
}
#ifdef INSN_SCHEDULING
if (optimize > 0 && flag_schedule_insns_after_reload)
{
......@@ -4633,6 +4633,7 @@ main (argc, argv)
if (optimize >= 3)
{
flag_inline_functions = 1;
flag_rename_registers = 1;
}
if (optimize < 2 || optimize_size)
......
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