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lvzhengyang
riscv-gcc-1
Commits
2a9704d0
Commit
2a9704d0
authored
Nov 19, 2013
by
Marcus Shawcroft
Committed by
Marcus Shawcroft
Nov 19, 2013
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[PATCH] [AArch64] Fix whitespace around aarch64_movdi_<mode>low
From-SVN: r205042
parent
3294102b
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9 additions
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3 deletions
+9
-3
gcc/ChangeLog
+6
-0
gcc/config/aarch64/aarch64.md
+3
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gcc/ChangeLog
View file @
2a9704d0
2013
-
11
-
19
Marcus
Shawcroft
<
marcus
.
shawcroft
@
arm
.
com
>
*
config
/
aarch64
/
aarch64
.
md
(
aarch64_movdi_
<
mode
>
low
,
*
add_
<
shift
>
_si_uxtw
):
Adjust
whitespace
.
2013
-
11
-
19
Marcus
Shawcroft
<
marcus
.
shawcroft
@
arm
.
com
>
*
config
/
aarch64
/
aarch64
.
h
(
PROFILE_HOOK
):
Fix
whitespace
.
2013
-
11
-
19
Joseph
Myers
<
joseph
@
codesourcery
.
com
>
gcc/config/aarch64/aarch64.md
View file @
2a9704d0
...
...
@@ -1311,8 +1311,8 @@
[
(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
(plus:SI (ASHIFT:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:QI 2 "aarch64_shift_imm_si" "n"))
(match_operand:SI 3 "register_operand" "r"))))]
(match_operand:QI 2 "aarch64_shift_imm_si" "n"))
(match_operand:SI 3 "register_operand" "r"))))]
""
"add
\\
t%w0, %w3, %w1,
<shift>
%2"
[
(set_attr "type" "alu_shift_imm")
...
...
@@ -3607,7 +3607,7 @@
;; The following secondary reload helpers patterns are invoked
;; after or during reload as we don't want these patterns to start
;; kicking in during the combiner.
(define_insn "aarch64_movdi_
<mode>
low"
[
(set (match_operand:DI 0 "register_operand" "=r")
(truncate:DI (match_operand:TX 1 "register_operand" "w")))]
...
...
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