Commit 2a86f515 by Paul Brook Committed by Paul Brook

arm.h (ARM_EMIT_TRAMPOLINE_CACHE_CLEAR): Define.

2005-01-05  Paul Brook  <paul@codesourcery.com>

	* config/arm/arm.h (ARM_EMIT_TRAMPOLINE_CACHE_CLEAR): Define.
	(INITIALIZE_TRAMPOLINE): Use it.
	* config/arm/linux-gas.h (INITIALIZE_TRAMPOLINE): Remove.
	* config/arm/netbsd.h (INITIALIZE_TRAMPOLINE): Remove.
	* config/arm/netbsd-elf.h (INITIALIZE_TRAMPOLINE): Remove.

From-SVN: r99068
parent d8fcd085
2005-01-05 Paul Brook <paul@codesourcery.com>
* config/arm/arm.h (ARM_EMIT_TRAMPOLINE_CACHE_CLEAR): Define.
(INITIALIZE_TRAMPOLINE): Use it.
* config/arm/linux-gas.h (INITIALIZE_TRAMPOLINE): Remove.
* config/arm/netbsd.h (INITIALIZE_TRAMPOLINE): Remove.
* config/arm/netbsd-elf.h (INITIALIZE_TRAMPOLINE): Remove.
2005-05-01 Gerald Pfeifer <gerald@pfeifer.com> 2005-05-01 Gerald Pfeifer <gerald@pfeifer.com>
* doc/install.texi (Specific): Omit dots in the @anchors names * doc/install.texi (Specific): Omit dots in the @anchors names
......
...@@ -1986,6 +1986,16 @@ typedef struct ...@@ -1986,6 +1986,16 @@ typedef struct
/* Alignment required for a trampoline in bits. */ /* Alignment required for a trampoline in bits. */
#define TRAMPOLINE_ALIGNMENT 32 #define TRAMPOLINE_ALIGNMENT 32
/* Call __clear_cache after setting up the trampoline unless this is a nop. */
#ifdef CLEAR_INSN_CACHE
#define ARM_EMIT_TRAMPOLINE_CACHE_CLEAR(TRAMP) \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \
plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode);
#else
#define ARM_EMIT_TRAMPOLINE_CACHE_CLEAR(TRAMP) do {} while (0)
#endif
/* Emit RTL insns to initialize the variable parts of a trampoline. /* Emit RTL insns to initialize the variable parts of a trampoline.
FNADDR is an RTX for the address of the function's pure code. FNADDR is an RTX for the address of the function's pure code.
CXT is an RTX for the static chain value for the function. */ CXT is an RTX for the static chain value for the function. */
...@@ -2000,6 +2010,7 @@ typedef struct ...@@ -2000,6 +2010,7 @@ typedef struct
plus_constant (TRAMP, \ plus_constant (TRAMP, \
TARGET_ARM ? 12 : 20)), \ TARGET_ARM ? 12 : 20)), \
FNADDR); \ FNADDR); \
ARM_EMIT_TRAMPOLINE_CACHE_CLEAR (TRAMP); \
} }
#endif #endif
......
...@@ -42,19 +42,6 @@ ...@@ -42,19 +42,6 @@
#undef WCHAR_TYPE_SIZE #undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE BITS_PER_WORD #define WCHAR_TYPE_SIZE BITS_PER_WORD
/* Emit code to set up a trampoline and synchronize the caches. */
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \
plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); \
}
/* Clear the instruction cache from `beg' to `end'. This makes an /* Clear the instruction cache from `beg' to `end'. This makes an
inline system call to SYS_cacheflush. */ inline system call to SYS_cacheflush. */
#define CLEAR_INSN_CACHE(BEG, END) \ #define CLEAR_INSN_CACHE(BEG, END) \
......
...@@ -136,21 +136,6 @@ ...@@ -136,21 +136,6 @@
#undef DEFAULT_STRUCTURE_SIZE_BOUNDARY #undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8 #define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8
/* Emit code to set up a trampoline and synchronize the caches. */
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
do \
{ \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \
plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); \
} \
while (0)
/* Clear the instruction cache from `BEG' to `END'. This makes a /* Clear the instruction cache from `BEG' to `END'. This makes a
call to the ARM_SYNC_ICACHE architecture specific syscall. */ call to the ARM_SYNC_ICACHE architecture specific syscall. */
#define CLEAR_INSN_CACHE(BEG, END) \ #define CLEAR_INSN_CACHE(BEG, END) \
......
...@@ -138,19 +138,6 @@ ...@@ -138,19 +138,6 @@
#undef DEFAULT_STRUCTURE_SIZE_BOUNDARY #undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8 #define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8
/* Emit code to set up a trampoline and synchronize the caches. */
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
(CXT)); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
(FNADDR)); \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \
plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); \
}
/* Clear the instruction cache from `BEG' to `END'. This makes a /* Clear the instruction cache from `BEG' to `END'. This makes a
call to the ARM32_SYNC_ICACHE architecture specific syscall. */ call to the ARM32_SYNC_ICACHE architecture specific syscall. */
#define CLEAR_INSN_CACHE(BEG, END) \ #define CLEAR_INSN_CACHE(BEG, END) \
......
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