Commit 29ec406a by Bill Schmidt Committed by William Schmidt

altivec.h (vec_adde): New define.

[gcc]

2015-08-18  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>

	* config/rs6000/altivec.h (vec_adde): New define.
	(vec_addec): Likewise.
	(vec_double): Likewise.
	(vec_bperm): Likewise.
	(vec_gb): Likewise.
	* config/rs6000/rs6000-builtin.def (ADDE): New
	BU_ALTIVEC_OVERLOAD_3.
	(ADDEC): Likewise.
	(DOUBLE): New BU_VSX_OVERLOAD_1.
	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add new
	entries for ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VEC_ADDE,
	ALTIVEC_BUILTIN_VEC_ADDEC, ALTIVEC_BUILTIN_VEC_ANDC,
	VSX_BUILTIN_VEC_DOUBLE, ALTIVEC_BUILTIN_VEC_MERGEH,
	ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VEC_NOR,
	ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VEC_XOR,
	ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VEC_SEL,
	P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_VEC_ORC,
	and P8V_BUILTIN_VEC_VBPERMQ.

[gcc/testsuite]

2015-08-18  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>

	* gcc.target/powerpc/altivec-35.c: New test.
	* gcc.target/powerpc/p8vector-builtin-8.c: New test.
	* gcc.target/powerpc/vsx-vector-7.c: New test.

From-SVN: r226995
parent 7940cae4
2015-08-18 Bill Schmidt <wschmidt@vnet.linux.ibm.com>
* config/rs6000/altivec.h (vec_adde): New define.
(vec_addec): Likewise.
(vec_double): Likewise.
(vec_bperm): Likewise.
(vec_gb): Likewise.
* config/rs6000/rs6000-builtin.def (ADDE): New
BU_ALTIVEC_OVERLOAD_3.
(ADDEC): Likewise.
(DOUBLE): New BU_VSX_OVERLOAD_1.
* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add new
entries for ALTIVEC_BUILTIN_VEC_ADDC, ALTIVEC_BUILTIN_VEC_ADDE,
ALTIVEC_BUILTIN_VEC_ADDEC, ALTIVEC_BUILTIN_VEC_ANDC,
VSX_BUILTIN_VEC_DOUBLE, ALTIVEC_BUILTIN_VEC_MERGEH,
ALTIVEC_BUILTIN_VEC_MERGEL, ALTIVEC_BUILTIN_VEC_NOR,
ALTIVEC_BUILTIN_VEC_OR, ALTIVEC_BUILTIN_VEC_XOR,
ALTIVEC_BUILTIN_VEC_PERM, ALTIVEC_BUILTIN_VEC_SEL,
P8V_BUILTIN_VEC_EQV, P8V_BUILTIN_VEC_NAND, P8V_BUILTIN_VEC_ORC,
and P8V_BUILTIN_VEC_VBPERMQ.
2015-08-18 Jason Merrill <jason@redhat.com> 2015-08-18 Jason Merrill <jason@redhat.com>
* print-tree.c (print_node): Handle TREE_BINFO. * print-tree.c (print_node): Handle TREE_BINFO.
......
...@@ -100,6 +100,8 @@ ...@@ -100,6 +100,8 @@
typed builtins. */ typed builtins. */
#define vec_vaddfp __builtin_vec_vaddfp #define vec_vaddfp __builtin_vec_vaddfp
#define vec_addc __builtin_vec_addc #define vec_addc __builtin_vec_addc
#define vec_adde __builtin_vec_adde
#define vec_addec __builtin_vec_addec
#define vec_vaddsws __builtin_vec_vaddsws #define vec_vaddsws __builtin_vec_vaddsws
#define vec_vaddshs __builtin_vec_vaddshs #define vec_vaddshs __builtin_vec_vaddshs
#define vec_vaddsbs __builtin_vec_vaddsbs #define vec_vaddsbs __builtin_vec_vaddsbs
...@@ -125,6 +127,7 @@ ...@@ -125,6 +127,7 @@
#define vec_cts __builtin_vec_cts #define vec_cts __builtin_vec_cts
#define vec_ctu __builtin_vec_ctu #define vec_ctu __builtin_vec_ctu
#define vec_cpsgn __builtin_vec_copysign #define vec_cpsgn __builtin_vec_copysign
#define vec_double __builtin_vec_double
#define vec_expte __builtin_vec_expte #define vec_expte __builtin_vec_expte
#define vec_floor __builtin_vec_floor #define vec_floor __builtin_vec_floor
#define vec_loge __builtin_vec_loge #define vec_loge __builtin_vec_loge
...@@ -340,6 +343,7 @@ ...@@ -340,6 +343,7 @@
#define vec_vaddudm __builtin_vec_vaddudm #define vec_vaddudm __builtin_vec_vaddudm
#define vec_vadduqm __builtin_vec_vadduqm #define vec_vadduqm __builtin_vec_vadduqm
#define vec_vbpermq __builtin_vec_vbpermq #define vec_vbpermq __builtin_vec_vbpermq
#define vec_bperm __builtin_vec_vbpermq
#define vec_vclz __builtin_vec_vclz #define vec_vclz __builtin_vec_vclz
#define vec_cntlz __builtin_vec_vclz #define vec_cntlz __builtin_vec_vclz
#define vec_vclzb __builtin_vec_vclzb #define vec_vclzb __builtin_vec_vclzb
...@@ -351,6 +355,7 @@ ...@@ -351,6 +355,7 @@
#define vec_vsubecuq __builtin_vec_vsubecuq #define vec_vsubecuq __builtin_vec_vsubecuq
#define vec_vsubeuqm __builtin_vec_vsubeuqm #define vec_vsubeuqm __builtin_vec_vsubeuqm
#define vec_vgbbd __builtin_vec_vgbbd #define vec_vgbbd __builtin_vec_vgbbd
#define vec_gb __builtin_vec_vgbbd
#define vec_vmaxsd __builtin_vec_vmaxsd #define vec_vmaxsd __builtin_vec_vmaxsd
#define vec_vmaxud __builtin_vec_vmaxud #define vec_vmaxud __builtin_vec_vmaxud
#define vec_vminsd __builtin_vec_vminsd #define vec_vminsd __builtin_vec_vminsd
......
...@@ -951,6 +951,8 @@ BU_ALTIVEC_X (VEC_EXT_V4SF, "vec_ext_v4sf", CONST) ...@@ -951,6 +951,8 @@ BU_ALTIVEC_X (VEC_EXT_V4SF, "vec_ext_v4sf", CONST)
before we get to the point about classifying the builtin type. */ before we get to the point about classifying the builtin type. */
/* 3 argument Altivec overloaded builtins. */ /* 3 argument Altivec overloaded builtins. */
BU_ALTIVEC_OVERLOAD_3 (ADDE, "adde")
BU_ALTIVEC_OVERLOAD_3 (ADDEC, "addec")
BU_ALTIVEC_OVERLOAD_3 (MADD, "madd") BU_ALTIVEC_OVERLOAD_3 (MADD, "madd")
BU_ALTIVEC_OVERLOAD_3 (MADDS, "madds") BU_ALTIVEC_OVERLOAD_3 (MADDS, "madds")
BU_ALTIVEC_OVERLOAD_3 (MLADD, "mladd") BU_ALTIVEC_OVERLOAD_3 (MLADD, "mladd")
...@@ -1447,6 +1449,9 @@ BU_VSX_OVERLOAD_2 (XXMRGLW, "xxmrglw") ...@@ -1447,6 +1449,9 @@ BU_VSX_OVERLOAD_2 (XXMRGLW, "xxmrglw")
BU_VSX_OVERLOAD_2 (XXSPLTD, "xxspltd") BU_VSX_OVERLOAD_2 (XXSPLTD, "xxspltd")
BU_VSX_OVERLOAD_2 (XXSPLTW, "xxspltw") BU_VSX_OVERLOAD_2 (XXSPLTW, "xxspltw")
/* 1 argument VSX overloaded builtin functions. */
BU_VSX_OVERLOAD_1 (DOUBLE, "double")
/* VSX builtins that are handled as special cases. */ /* VSX builtins that are handled as special cases. */
BU_VSX_OVERLOAD_X (LD, "ld") BU_VSX_OVERLOAD_X (LD, "ld")
BU_VSX_OVERLOAD_X (ST, "st") BU_VSX_OVERLOAD_X (ST, "st")
......
2015-08-18 Bill Schmidt <wschmidt@vnet.linux.ibm.com>
* gcc.target/powerpc/altivec-35.c: New test.
* gcc.target/powerpc/p8vector-builtin-8.c: New test.
* gcc.target/powerpc/vsx-vector-7.c: New test.
2015-08-18 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> 2015-08-18 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
PR middle-end/36757 PR middle-end/36757
......
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec -mno-vsx -mno-power8-vector -O0" } */
#include <altivec.h>
/* Test Altivec built-ins added for version 1.1 of ELFv2 ABI. */
vector signed int vsia, vsib;
void foo (vector signed int *vsir)
{
*vsir++ = vec_addc (vsia, vsib);
}
/* { dg-final { scan-assembler-times "vaddcuw" 1 } } */
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_p8vector_ok } */
/* { dg-options "-mpower8-vector -O2" } */
#include <altivec.h>
/* Test POWER8 vector built-ins added for version 1.1 of ELFv2 ABI. */
vector unsigned char vuca, vucb, vucc;
vector bool char vbca, vbcb;
vector bool short vbsa, vbsb;
vector bool int vbia, vbib;
vector signed long long vsla, vslb;
vector unsigned long long vula, vulb, vulc;
vector bool long long vbla, vblb, vblc;
vector signed __int128 vsxa, vsxb, vsxc;
vector unsigned __int128 vuxa, vuxb, vuxc;
vector double vda, vdb;
void foo (vector unsigned char *vucr,
vector bool char *vbcr,
vector bool short *vbsr,
vector bool int *vbir,
vector unsigned long long *vulr,
vector bool long long *vblr,
vector signed __int128 *vsxr,
vector unsigned __int128 *vuxr,
vector double *vdr)
{
*vsxr++ = vec_addc (vsxa, vsxb);
*vuxr++ = vec_addc (vuxa, vuxb);
*vsxr++ = vec_adde (vsxa, vsxb, vsxc);
*vuxr++ = vec_adde (vuxa, vuxb, vuxc);
*vsxr++ = vec_addec (vsxa, vsxb, vsxc);
*vuxr++ = vec_addec (vuxa, vuxb, vuxc);
*vulr++ = vec_bperm (vuxa, vucb);
*vbcr++ = vec_eqv (vbca, vbcb);
*vbir++ = vec_eqv (vbia, vbib);
*vblr++ = vec_eqv (vbla, vblb);
*vbsr++ = vec_eqv (vbsa, vbsb);
*vucr++ = vec_gb (vuca);
*vbcr++ = vec_nand (vbca, vbcb);
*vbir++ = vec_nand (vbia, vbib);
*vblr++ = vec_nand (vbla, vblb);
*vbsr++ = vec_nand (vbsa, vbsb);
*vbcr++ = vec_orc (vbca, vbcb);
*vbir++ = vec_orc (vbia, vbib);
*vblr++ = vec_orc (vbla, vblb);
*vbsr++ = vec_orc (vbsa, vbsb);
*vblr++ = vec_perm (vbla, vblb, vucc);
}
/* { dg-final { scan-assembler-times "vaddcuq" 2 } } */
/* { dg-final { scan-assembler-times "vaddeuqm" 2 } } */
/* { dg-final { scan-assembler-times "vaddecuq" 2 } } */
/* { dg-final { scan-assembler-times "vbpermq" 1 } } */
/* { dg-final { scan-assembler-times "xxleqv" 4 } } */
/* { dg-final { scan-assembler-times "vgbbd" 1 } } */
/* { dg-final { scan-assembler-times "xxlnand" 4 } } */
/* { dg-final { scan-assembler-times "xxlorc" 4 } } */
/* { dg-final { scan-assembler-times "vperm" 1 } } */
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-options "-mvsx -mno-power8-vector -O2" } */
#include <altivec.h>
/* Test VSX built-ins added for version 1.1 of ELFv2 ABI. */
vector bool long long vbla, vblb, vblc;
vector signed long long vsla;
vector unsigned long long vula, vulc;
void foo (vector bool long long *vblr,
vector double *vdr)
{
*vblr++ = vec_andc (vbla, vblb);
*vdr++ = vec_double (vsla);
*vdr++ = vec_double (vula);
*vblr++ = vec_mergeh (vbla, vblb);
*vblr++ = vec_mergel (vbla, vblb);
*vblr++ = vec_nor (vbla, vblb);
*vblr++ = vec_or (vbla, vblb);
*vblr++ = vec_sel (vbla, vblb, vblc);
*vblr++ = vec_sel (vbla, vblb, vulc);
*vblr++ = vec_xor (vbla, vblb);
}
/* { dg-final { scan-assembler-times "xxlandc" 1 } } */
/* { dg-final { scan-assembler-times "xvcvsxddp" 1 } } */
/* { dg-final { scan-assembler-times "xvcvuxddp" 1 } } */
/* { dg-final { scan-assembler-times "xxpermdi .*,.*,.*,3" 1 } } */
/* { dg-final { scan-assembler-times "xxpermdi .*,.*,.*,0" 1 } } */
/* { dg-final { scan-assembler-times "xxlnor" 1 } } */
/* { dg-final { scan-assembler-times "xxlor" 1 } } */
/* { dg-final { scan-assembler-times "xxsel" 2 } } */
/* { dg-final { scan-assembler-times "xxlxor" 1 } } */
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