Skip to content

R
riscv-gcc-1
Commit 299c5111 by Kazu Hirata Committed by Kazu Hirata
Options

* doc/md.texi (pushm): Fix a typo. 

From-SVN: r60072
parent 2eb96bdb
Showing with 5 additions and 1 deletions
gcc/ChangeLog
2002-12-12 Kazu Hirata <kazu@cs.umass.edu>
* doc/md.texi (pushm): Fix a typo.
2002-12-12 Alexandre Oliva <aoliva@redhat.com>
* config/mips/mips.c (mips_output_conditional_branch): Support
......
gcc/doc/md.texi
......@@ -2506,7 +2506,7 @@ operand 2 is a constant: the number of consecutive registers.
@cindex @code{push@var{m}} instruction pattern
@item @samp{push@var{m}}
Output an push instruction. Operand 0 is value to push. Used only when
Output a push instruction. Operand 0 is value to push. Used only when
@code{PUSH_ROUNDING} is defined. For historical reason, this pattern may be
missing and in such case an @code{mov} expander is used instead, with a
@code{MEM} expression forming the push operation. The @code{mov} expander
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment