Commit 28dd75a3 by H.J. Lu Committed by H.J. Lu

Limit mask of vec_merge to HOST_BITS_PER_WIDE_INT

Since mask of vec_merge is in HOST_WIDE_INT, HOST_BITS_PER_WIDE_INT is
the maximum number of vector elements.

	* simplify-rtx.c (simplify_subreg): Limit mask of vec_merge to
	HOST_BITS_PER_WIDE_INT.
	(test_vector_ops_duplicate): Likewise.

From-SVN: r265290
parent 9a91ed2a
2018-10-18 H.J. Lu <hongjiu.lu@intel.com>
* simplify-rtx.c (simplify_subreg): Limit mask of vec_merge to
HOST_BITS_PER_WIDE_INT.
(test_vector_ops_duplicate): Likewise.
2018-10-18 H.J. Lu <hongjiu.lu@intel.com>
PR target/72782
* config/i386/sse.md (VF_AVX512): New.
(avx512bcst): Likewise.
......@@ -6611,6 +6611,7 @@ simplify_subreg (machine_mode outermode, rtx op,
*/
unsigned int idx;
if (constant_multiple_p (byte, GET_MODE_SIZE (outermode), &idx)
&& idx < HOST_BITS_PER_WIDE_INT
&& GET_CODE (op) == VEC_MERGE
&& GET_MODE_INNER (innermode) == outermode
&& CONST_INT_P (XEXP (op, 2))
......@@ -6861,6 +6862,8 @@ test_vector_ops_duplicate (machine_mode mode, rtx scalar_reg)
rtx vector_reg = make_test_reg (mode);
for (unsigned HOST_WIDE_INT i = 0; i < const_nunits; i++)
{
if (i >= HOST_BITS_PER_WIDE_INT)
break;
rtx mask = GEN_INT ((HOST_WIDE_INT_1U << i) | (i + 1));
rtx vm = gen_rtx_VEC_MERGE (mode, duplicate, vector_reg, mask);
poly_uint64 offset = i * GET_MODE_SIZE (inner_mode);
......
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