rl78-protos.h (rl78_split_movsi): Accept a mode as well.

* config/rl78/rl78-protos.h (rl78_split_movsi): Accept a mode as
well.
* config/rl78/rl78-expand.md (movsf): New, same as movsi.
* config/rl78/rl78.c (rl78_split_movsi): Accept a mode, use it
instead of hardcoding SImode.

From-SVN: r220951

gcc/ChangeLog

+2015-02-24  DJ Delorie  <dj@redhat.com>
+
+	* config/rl78/rl78-protos.h (rl78_split_movsi): Accept a mode as
+	well.
+	* config/rl78/rl78-expand.md (movsf): New, same as movsi.
+	* config/rl78/rl78.c (rl78_split_movsi): Accept a mode, use it
+	instead of hardcoding SImode.
+
 2015-02-24  Bernd Schmidt  <bernds@codesourcery.com>
 
 	* omp-low.c (create_omp_child_function): Tag entrypoint

gcc/config/rl78/rl78-expand.md

@@ -87,7 +87,21 @@
 	(match_operand:HI 4 "general_operand"))
    (set (match_operand:HI 3 "nonimmediate_operand")
 	(match_operand:HI 5 "general_operand"))]
-  "rl78_split_movsi (operands);"
+  "rl78_split_movsi (operands, SImode);"
+  [(set_attr "valloc" "op1")]
+)
+
+(define_insn_and_split "movsf"
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=vYS,v,Wfr")
+	(match_operand:SF 1 "general_operand" "viYS,Wfr,v"))]
+  ""
+  "#"
+  ""
+  [(set (match_operand:HI 2 "nonimmediate_operand")
+	(match_operand:HI 4 "general_operand"))
+   (set (match_operand:HI 3 "nonimmediate_operand")
+	(match_operand:HI 5 "general_operand"))]
+  "rl78_split_movsi (operands, SFmode);"
   [(set_attr "valloc" "op1")]
 )
 

gcc/config/rl78/rl78-protos.h

@@ -21,7 +21,7 @@
 void		rl78_emit_eh_epilogue (rtx);
 void		rl78_expand_compare (rtx *);
 void		rl78_expand_movsi (rtx *);
-void		rl78_split_movsi (rtx *);
+void		rl78_split_movsi (rtx *, enum machine_mode);
 int		rl78_force_nonfar_2 (rtx *, rtx (*gen)(rtx,rtx));
 int		rl78_force_nonfar_3 (rtx *, rtx (*gen)(rtx,rtx,rtx));
 void		rl78_expand_eh_epilogue (rtx);

gcc/config/rl78/rl78.c

@@ -506,12 +506,12 @@ rl78_expand_movsi (rtx *operands)
 
 /* Generate code to move an SImode value.  */
 void
-rl78_split_movsi (rtx *operands)
+rl78_split_movsi (rtx *operands, enum machine_mode omode)
 {
   rtx op00, op02, op10, op12;
 
-  op00 = rl78_subreg (HImode, operands[0], SImode, 0);
-  op02 = rl78_subreg (HImode, operands[0], SImode, 2);
+  op00 = rl78_subreg (HImode, operands[0], omode, 0);
+  op02 = rl78_subreg (HImode, operands[0], omode, 2);
 
   if (GET_CODE (operands[1]) == CONST
       || GET_CODE (operands[1]) == SYMBOL_REF)
@@ -523,8 +523,8 @@ rl78_split_movsi (rtx *operands)
     }
   else
     {
-      op10 = rl78_subreg (HImode, operands[1], SImode, 0);
-      op12 = rl78_subreg (HImode, operands[1], SImode, 2);
+      op10 = rl78_subreg (HImode, operands[1], omode, 0);
+      op12 = rl78_subreg (HImode, operands[1], omode, 2);
     }
 
   if (rtx_equal_p (operands[0], operands[1]))