Commit 283dd633 by Richard Henderson Committed by Richard Henderson

alpha.md (movqicc_internal): Allow exactly one zero in the conditional.

        * config/alpha/alpha.md (movqicc_internal): Allow exactly one
        zero in the conditional.
        (movhicc_internal, movsicc_internal, movdicc_internal): Likewise.

From-SVN: r89766
parent 9d80ef7c
2004-10-28 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.md (movqicc_internal): Allow exactly one
zero in the conditional.
(movhicc_internal, movsicc_internal, movdicc_internal): Likewise.
2004-10-28 Richard Henderson <rth@redhat.com>
* cse.c (memory_extend_rtx): Remove.
(cse_main): Don't set it.
(cse_insn): Use a local buffer instead.
......
......@@ -3061,7 +3061,7 @@
(match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
(match_operand:QI 1 "add_operand" "rI,0,rI,0")
(match_operand:QI 5 "add_operand" "0,rI,0,rI")))]
"(operands[3] == const0_rtx || operands[4] == const0_rtx)"
"(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
"@
cmov%C2 %r3,%1,%0
cmov%D2 %r3,%5,%0
......@@ -3077,7 +3077,7 @@
(match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
(match_operand:HI 1 "add_operand" "rI,0,rI,0")
(match_operand:HI 5 "add_operand" "0,rI,0,rI")))]
"(operands[3] == const0_rtx || operands[4] == const0_rtx)"
"(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
"@
cmov%C2 %r3,%1,%0
cmov%D2 %r3,%5,%0
......@@ -3093,7 +3093,7 @@
(match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
(match_operand:SI 1 "add_operand" "rI,0,rI,0")
(match_operand:SI 5 "add_operand" "0,rI,0,rI")))]
"(operands[3] == const0_rtx || operands[4] == const0_rtx)"
"(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
"@
cmov%C2 %r3,%1,%0
cmov%D2 %r3,%5,%0
......@@ -3109,7 +3109,7 @@
(match_operand:DI 4 "reg_or_0_operand" "J,J,rJ,rJ")])
(match_operand:DI 1 "add_operand" "rI,0,rI,0")
(match_operand:DI 5 "add_operand" "0,rI,0,rI")))]
"(operands[3] == const0_rtx || operands[4] == const0_rtx)"
"(operands[3] == const0_rtx) ^ (operands[4] == const0_rtx)"
"@
cmov%C2 %r3,%1,%0
cmov%D2 %r3,%5,%0
......
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