Commit 27e83a44 by Ramana Radhakrishnan Committed by Ramana Radhakrishnan

re PR target/61154 ([ARM] wide-int merge introduced regressions in vshuf tests)

Fix PR target/61154

2014-06-02  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	PR target/61154
	* config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
	* config/arm/arm.md (mov64 splitter): Replace const_double_operand
	with immediate_operand.

From-SVN: r211129
parent 2ba0071e
2014-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/61154
* config/arm/arm.h (TARGET_SUPPORTS_WIDE_INT): Define.
* config/arm/arm.md (mov64 splitter): Replace const_double_operand
with immediate_operand.
2014-06-02 Andreas Schwab <schwab@suse.de> 2014-06-02 Andreas Schwab <schwab@suse.de>
* config/ia64/ia64.c * config/ia64/ia64.c
......
...@@ -2395,5 +2395,5 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); ...@@ -2395,5 +2395,5 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#endif #endif
#define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS #define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS
#define TARGET_SUPPORTS_WIDE_INT 1
#endif /* ! GCC_ARM_H */ #endif /* ! GCC_ARM_H */
...@@ -5990,7 +5990,7 @@ ...@@ -5990,7 +5990,7 @@
(define_split (define_split
[(set (match_operand:ANY64 0 "arm_general_register_operand" "") [(set (match_operand:ANY64 0 "arm_general_register_operand" "")
(match_operand:ANY64 1 "const_double_operand" ""))] (match_operand:ANY64 1 "immediate_operand" ""))]
"TARGET_32BIT "TARGET_32BIT
&& reload_completed && reload_completed
&& (arm_const_double_inline_cost (operands[1]) && (arm_const_double_inline_cost (operands[1])
......
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