Commit 266da7a2 by Jan Hubicka Committed by Jan Hubicka

invoke.texi (-mreg-alloc): Nuke.

	* invoke.texi (-mreg-alloc): Nuke.
	* i386.c (ix86_reg_alloc_order, regs_allocated,
	order_regs_for_local_alloc): Nuke.
	(override_options): Kill reg_alloc code.
	* i386.h (TARGET_OPTIONS): Kill reg-alloc.
	(REG_ALLOC_ORDER): SSE goes before I387.
	(ORDER_REGS_FOR_LOCAL_ALLOC): Kill.
	(ix86_reg_alloc_order): Likewise.
	* i386-protos.h (ix86_reg_alloc_order): Kill.

From-SVN: r39697
parent 121bc96b
Wed Feb 14 12:37:37 CET 2001 Jan Hubicka <jh@suse.cz>
* invoke.texi (-mreg-alloc): Nuke.
* i386.c (ix86_reg_alloc_order, regs_allocated,
order_regs_for_local_alloc): Nuke.
(override_options): Kill reg_alloc code.
* i386.h (TARGET_OPTIONS): Kill reg-alloc.
(REG_ALLOC_ORDER): SSE goes before I387.
(ORDER_REGS_FOR_LOCAL_ALLOC): Kill.
(ix86_reg_alloc_order): Likewise.
* i386-protos.h (ix86_reg_alloc_order): Kill.
2001-02-14 Richard Henderson <rth@redhat.com> 2001-02-14 Richard Henderson <rth@redhat.com>
* toplev.c (f_options): Clarify -fschedule-insns2 documentation. * toplev.c (f_options): Clarify -fschedule-insns2 documentation.
......
...@@ -21,7 +21,6 @@ Boston, MA 02111-1307, USA. */ ...@@ -21,7 +21,6 @@ Boston, MA 02111-1307, USA. */
/* Functions in i386.c */ /* Functions in i386.c */
extern void override_options PARAMS ((void)); extern void override_options PARAMS ((void));
extern void order_regs_for_local_alloc PARAMS ((void));
extern void optimization_options PARAMS ((int, int)); extern void optimization_options PARAMS ((int, int));
extern int ix86_can_use_return_insn_p PARAMS ((void)); extern int ix86_can_use_return_insn_p PARAMS ((void));
......
...@@ -412,10 +412,6 @@ int ix86_arch; ...@@ -412,10 +412,6 @@ int ix86_arch;
const char *ix86_cpu_string; /* for -mcpu=<xxx> */ const char *ix86_cpu_string; /* for -mcpu=<xxx> */
const char *ix86_arch_string; /* for -march=<xxx> */ const char *ix86_arch_string; /* for -march=<xxx> */
/* Register allocation order */
const char *ix86_reg_alloc_order;
static char regs_allocated[FIRST_PSEUDO_REGISTER];
/* # of registers to use to pass arguments. */ /* # of registers to use to pass arguments. */
const char *ix86_regparm_string; const char *ix86_regparm_string;
...@@ -611,39 +607,6 @@ override_options () ...@@ -611,39 +607,6 @@ override_options ()
mark_machine_status = ix86_mark_machine_status; mark_machine_status = ix86_mark_machine_status;
free_machine_status = ix86_free_machine_status; free_machine_status = ix86_free_machine_status;
/* Validate registers in register allocation order. */
if (ix86_reg_alloc_order)
{
int ch;
for (i = 0; (ch = ix86_reg_alloc_order[i]) != '\0'; i++)
{
int regno = -1;
switch (ch)
{
case 'a': regno = 0; break;
case 'd': regno = 1; break;
case 'c': regno = 2; break;
case 'b': regno = 3; break;
case 'S': regno = 4; break;
case 'D': regno = 5; break;
case 'B': regno = 6; break;
default: error ("Register '%c' is unknown", ch);
}
if (regno >= 0)
{
if (regs_allocated[regno])
error ("Register '%c' already specified in allocation order",
ch);
regs_allocated[regno] = 1;
}
}
}
/* Validate -mregparm= value. */ /* Validate -mregparm= value. */
if (ix86_regparm_string) if (ix86_regparm_string)
{ {
...@@ -726,61 +689,6 @@ override_options () ...@@ -726,61 +689,6 @@ override_options ()
target_flags |= MASK_MMX; target_flags |= MASK_MMX;
} }
/* A C statement (sans semicolon) to choose the order in which to
allocate hard registers for pseudo-registers local to a basic
block.
Store the desired register order in the array `reg_alloc_order'.
Element 0 should be the register to allocate first; element 1, the
next register; and so on.
The macro body should not assume anything about the contents of
`reg_alloc_order' before execution of the macro.
On most machines, it is not necessary to define this macro. */
void
order_regs_for_local_alloc ()
{
int i, ch, order;
/* User specified the register allocation order. */
if (ix86_reg_alloc_order)
{
for (i = order = 0; (ch = ix86_reg_alloc_order[i]) != '\0'; i++)
{
int regno = 0;
switch (ch)
{
case 'a': regno = 0; break;
case 'd': regno = 1; break;
case 'c': regno = 2; break;
case 'b': regno = 3; break;
case 'S': regno = 4; break;
case 'D': regno = 5; break;
case 'B': regno = 6; break;
}
reg_alloc_order[order++] = regno;
}
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
if (! regs_allocated[i])
reg_alloc_order[order++] = i;
}
}
/* If user did not specify a register allocation order, use natural order. */
else
{
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
reg_alloc_order[i] = i;
}
}
void void
optimization_options (level, size) optimization_options (level, size)
int level; int level;
......
...@@ -366,8 +366,6 @@ extern int ix86_arch; ...@@ -366,8 +366,6 @@ extern int ix86_arch;
N_("Schedule code for given CPU")}, \ N_("Schedule code for given CPU")}, \
{ "arch=", &ix86_arch_string, \ { "arch=", &ix86_arch_string, \
N_("Generate code for given CPU")}, \ N_("Generate code for given CPU")}, \
{ "reg-alloc=", &ix86_reg_alloc_order, \
N_("Control allocation order of integer registers") }, \
{ "regparm=", &ix86_regparm_string, \ { "regparm=", &ix86_regparm_string, \
N_("Number of registers used to pass integer arguments") }, \ N_("Number of registers used to pass integer arguments") }, \
{ "align-loops=", &ix86_align_loops_string, \ { "align-loops=", &ix86_align_loops_string, \
...@@ -717,30 +715,17 @@ extern int ix86_arch; ...@@ -717,30 +715,17 @@ extern int ix86_arch;
generated by allocating edx first, so restore the 'natural' order of things. */ generated by allocating edx first, so restore the 'natural' order of things. */
#define REG_ALLOC_ORDER \ #define REG_ALLOC_ORDER \
/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/ \ /*ax,dx,cx,bx,si,di,bp,sp*/ \
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \ { 0, 1, 2, 3, 4, 5, 6, 7, \
/*,arg,cc,fpsr,dir,frame*/ \ /*,arg,cc,fpsr,dir,frame*/ \
16,17, 18, 19, 20, \ 16,17, 18, 19, 20, \
/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \ /*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/ \
21, 22, 23, 24, 25, 26, 27, 28, \ 21, 22, 23, 24, 25, 26, 27, 28, \
/*st,st1,st2,st3,st4,st5,st6,st7*/ \
8, 9, 10, 11, 12, 13, 14, 15, \
/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \ /*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/ \
29, 30, 31, 32, 33, 34, 35, 36 } 29, 30, 31, 32, 33, 34, 35, 36 }
/* A C statement (sans semicolon) to choose the order in which to
allocate hard registers for pseudo-registers local to a basic
block.
Store the desired register order in the array `reg_alloc_order'.
Element 0 should be the register to allocate first; element 1, the
next register; and so on.
The macro body should not assume anything about the contents of
`reg_alloc_order' before execution of the macro.
On most machines, it is not necessary to define this macro. */
#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
/* Macro to conditionally modify fixed_regs/call_used_regs. */ /* Macro to conditionally modify fixed_regs/call_used_regs. */
#define CONDITIONAL_REGISTER_USAGE \ #define CONDITIONAL_REGISTER_USAGE \
{ \ { \
...@@ -2897,7 +2882,6 @@ do { long l; \ ...@@ -2897,7 +2882,6 @@ do { long l; \
/* Variables in i386.c */ /* Variables in i386.c */
extern const char *ix86_cpu_string; /* for -mcpu=<xxx> */ extern const char *ix86_cpu_string; /* for -mcpu=<xxx> */
extern const char *ix86_arch_string; /* for -march=<xxx> */ extern const char *ix86_arch_string; /* for -march=<xxx> */
extern const char *ix86_reg_alloc_order; /* register allocation order */
extern const char *ix86_regparm_string; /* # registers to use to pass args */ extern const char *ix86_regparm_string; /* # registers to use to pass args */
extern const char *ix86_align_loops_string; /* power of two alignment for loops */ extern const char *ix86_align_loops_string; /* power of two alignment for loops */
extern const char *ix86_align_jumps_string; /* power of two alignment for non-loop jumps */ extern const char *ix86_align_jumps_string; /* power of two alignment for non-loop jumps */
......
...@@ -457,12 +457,11 @@ in the following sections. ...@@ -457,12 +457,11 @@ in the following sections.
-mintel-syntax -mieee-fp -mno-fancy-math-387 @gol -mintel-syntax -mieee-fp -mno-fancy-math-387 @gol
-mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol -mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol
-mno-wide-multiply -mrtd -malign-double @gol -mno-wide-multiply -mrtd -malign-double @gol
-mreg-alloc=@var{list} -mregparm=@var{num} @gol
-malign-jumps=@var{num} -malign-loops=@var{num} @gol -malign-jumps=@var{num} -malign-loops=@var{num} @gol
-malign-functions=@var{num} -mpreferred-stack-boundary=@var{num} @gol -malign-functions=@var{num} -mpreferred-stack-boundary=@var{num} @gol
-mthreads -mno-align-stringops -minline-all-stringops @gol -mthreads -mno-align-stringops -minline-all-stringops @gol
-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol -mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
-m96bit-long-double} -m96bit-long-double} -mregparm=@var{num} @gol
@emph{HPPA Options} @emph{HPPA Options}
@gccoptlist{ @gccoptlist{
...@@ -6646,13 +6645,6 @@ In addition, seriously incorrect code will result if you call a ...@@ -6646,13 +6645,6 @@ In addition, seriously incorrect code will result if you call a
function with too many arguments. (Normally, extra arguments are function with too many arguments. (Normally, extra arguments are
harmlessly ignored.) harmlessly ignored.)
@item -mreg-alloc=@var{regs}
Control the default allocation order of integer registers. The
string @var{regs} is a series of letters specifying a register. The
supported letters are: @code{a} allocate EAX; @code{b} allocate EBX;
@code{c} allocate ECX; @code{d} allocate EDX; @code{S} allocate ESI;
@code{D} allocate EDI; @code{B} allocate EBP.
@item -mregparm=@var{num} @item -mregparm=@var{num}
Control how many registers are used to pass integer arguments. By Control how many registers are used to pass integer arguments. By
default, no registers are used to pass arguments, and at most 3 default, no registers are used to pass arguments, and at most 3
......
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