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lvzhengyang
riscv-gcc-1
Commits
26153085
Commit
26153085
authored
Jun 23, 2009
by
Michael Meissner
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From-SVN: r148870
parent
cacf1ca8
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gcc/config/rs6000/rs6000.h
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26153085
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@@ -1310,7 +1310,8 @@ extern enum reg_class rs6000_regno_regclass[FIRST_PSEUDO_REGISTER];
#define REGNO_REG_CLASS(REGNO) rs6000_regno_regclass[(REGNO)]
#endif
/* VSX register classes. */
/* Register classes for altivec registers (and eventually other vector
units). */
extern
enum
reg_class
rs6000_vector_reg_class
[];
/* The class value for index registers, and the one for base regs. */
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