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riscv-gcc-1
Commit 254f5222 by Chen Liqin Committed by Chen Liqin
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Because we merge score3 and score7 into the same backend, 

so make a lot of changes in the code structure.

Changelog:
        * config.gcc : update score-*-elf(extra_objs).
        * config/score/mac.md : Remove.
        * config/score/misc.md : Remove.
        * config/score/score7.md : Remove.
        * config/score/score-mdaux.h : Remove.
        * config/score/score-mdaux.c : Remove.
        * config/score/score-version.h : Remove.
        * config/score/score-generic.md : New.
        * config/score/score3.h : New.
        * config/score/score3.c : New.
        * config/score/score7.h : New.
        * config/score/score7.c : New.
        * config/score/mul-div.S : add flush_cache score3 support.
        * config/score/elf.h : Fix some typos.
        * config/score/score.md : merge score3 and score7 pattern.
        * config/score/score.c : use to seperate which target it used.
        * config/score/score.h : use to seperate the target macro.
        * config/score/score.opt : remove -mmac option , add -mscore3,
        -mscore3d and -march OPTION support.

From-SVN: r129431
parent 23710ddd
Showing with 578 additions and 449 deletions
gcc/ChangeLog
2007-10-18 Chen Liqin <liqin@sunnorth.com.cn>
* config.gcc : update score-*-elf(extra_objs).
* config/score/mac.md : Remove.
* config/score/misc.md : Remove.
* config/score/score7.md : Remove.
* config/score/score-mdaux.h : Remove.
* config/score/score-mdaux.c : Remove.
* config/score/score-version.h : Remove.
* config/score/score-generic.md : New.
* config/score/score3.h : New.
* config/score/score3.c : New.
* config/score/score7.h : New.
* config/score/score7.c : New.
* config/score/mul-div.S : add flush_cache score3 support.
* config/score/elf.h : Fix some typos.
* config/score/score.md : merge score3 and score7 pattern.
* config/score/score.c : use to seperate which target it used.
* config/score/score.h : use to seperate the target macro.
* config/score/score.opt : remove -mmac option , add -mscore3,
-mscore3d and -march OPTION support.
2007-10-17 Andrew Pinski <andrew_pinski@playstation.sony.com> 2007-10-17 Andrew Pinski <andrew_pinski@playstation.sony.com>
* cfgexpand.c (expand_stack_vars): Add checking to make sure * cfgexpand.c (expand_stack_vars): Add checking to make sure
gcc/config.gcc
...@@ -2127,7 +2127,7 @@ s390x-ibm-tpf*) ...@@ -2127,7 +2127,7 @@ s390x-ibm-tpf*)
score-*-elf) score-*-elf)
tm_file="dbxelf.h elfos.h score/elf.h score/score.h" tm_file="dbxelf.h elfos.h score/elf.h score/score.h"
tmake_file=score/t-score-elf tmake_file=score/t-score-elf
extra_objs="score-mdaux.o" extra_objs="score7.o score3.o"
;; ;;
sh-*-elf* | sh[12346l]*-*-elf* | sh*-*-kaos* | \ sh-*-elf* | sh[12346l]*-*-elf* | sh*-*-kaos* | \
sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
......
gcc/config/score/crti.asm
...@@ -34,6 +34,7 @@ ...@@ -34,6 +34,7 @@
# This file makes a stack frame for the contents of the .init and # This file makes a stack frame for the contents of the .init and
# .fini sections. # .fini sections.
.extern _stack
#ifndef __pic__ #ifndef __pic__
.section .init, "ax", @progbits .section .init, "ax", @progbits
...@@ -88,9 +89,13 @@ _fini: ...@@ -88,9 +89,13 @@ _fini:
.weak _start .weak _start
.ent _start .ent _start
.frame r0, 0, r3, 0 .frame r0, 0, r3, 0
.mask 0x00000000,0 .mask 0x00000000, 0
_start: _start:
la r28, _gp mv r29, r3
bl 0f
0:
.cpload r3
mv r3, r29
la r8, __bss_start la r8, __bss_start
la r9, __bss_end__ la r9, __bss_end__
sub! r9, r8 sub! r9, r8
...@@ -102,22 +107,23 @@ _start: ...@@ -102,22 +107,23 @@ _start:
sw r9, [r8]+, 4 sw r9, [r8]+, 4
bcnz 1b bcnz 1b
la r0, _stack la r0, _stack
ldiu! r4, 0 bl _init
ldiu! r5, 0 la r4, _end
la r29, main la r29, _init_argv
brl r29 brl r29
la r29, exit la r29, exit
brl r29 brl r29
.end _start .end _start
.weak _init_argv .weak _init_argv
.ent .ent _init_argv
.frame r0, 0, r3, 0 .frame r0, 0, r3, 0
.mask 0x00000000, 0 .mask 0x00000000, 0
_init_argv: _init_argv:
ldiu! r4, 0 ldiu! r4, 0
ldiu! r5, 0 ldiu! r5, 0
j main la r29, main
brl r29
.end _init_argv .end _init_argv
.globl _init .globl _init
...@@ -126,7 +132,7 @@ _init: ...@@ -126,7 +132,7 @@ _init:
addi r0, -32 addi r0, -32
sw r3, [r0, 20] sw r3, [r0, 20]
.section .fini, "ax", @progbits .section .fini, "ax", @progbits
.globl _fini .globl _fini
.type _fini, %function .type _fini, %function
_fini: _fini:
...@@ -134,5 +140,3 @@ _fini: ...@@ -134,5 +140,3 @@ _fini:
sw r3, [r0, 20] sw r3, [r0, 20]
#endif #endif
gcc/config/score/elf.h
...@@ -32,16 +32,16 @@ ...@@ -32,16 +32,16 @@
#define TYPE_OPERAND_FMT "@%s" #define TYPE_OPERAND_FMT "@%s"
#undef TYPE_ASM_OP #undef TYPE_ASM_OP
#define TYPE_ASM_OP "\t.type\t" #define TYPE_ASM_OP "\t.type\t"
#undef SIZE_ASM_OP #undef SIZE_ASM_OP
#define SIZE_ASM_OP "\t.size\t" #define SIZE_ASM_OP "\t.size\t"
/* A c expression whose value is a string containing the /* A c expression whose value is a string containing the
assembler operation to identify the following data as assembler operation to identify the following data as
uninitialized global data. */ uninitialized global data. */
#ifndef BSS_SECTION_ASM_OP #ifndef BSS_SECTION_ASM_OP
#define BSS_SECTION_ASM_OP "\t.section\t.bss" #define BSS_SECTION_ASM_OP "\t.section\t.bss"
#endif #endif
#ifndef ASM_OUTPUT_ALIGNED_BSS #ifndef ASM_OUTPUT_ALIGNED_BSS
......
gcc/config/score/mac.md deleted 100644 → 0
;; Machine description for Sunplus S+CORE
;; Copyright (C) 2005, 2007
;; Free Software Foundation, Inc.
;; Contributed by Sunnorth.
;; This file is part of GCC.
;; GCC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;; GCC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;; GNU General Public License for more details.
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>.
;;- See file "rtl.def" for documentation on define_insn, match_*, et. al.
(define_insn "smaxsi3"
[(set (match_operand:SI 0 "register_operand" "=d")
(smax:SI (match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "register_operand" "d")))]
"TARGET_MAC || TARGET_SCORE7D"
"max %0, %1, %2"
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
(define_insn "sminsi3"
[(set (match_operand:SI 0 "register_operand" "=d")
(smin:SI (match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "register_operand" "d")))]
"TARGET_MAC || TARGET_SCORE7D"
"min %0, %1, %2"
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
(define_insn "abssi2"
[(set (match_operand:SI 0 "register_operand" "=d")
(abs:SI (match_operand:SI 1 "register_operand" "d")))]
"TARGET_MAC || TARGET_SCORE7D"
"abs %0, %1"
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
(define_insn "clzsi2"
[(set (match_operand:SI 0 "register_operand" "=d")
(clz:SI (match_operand:SI 1 "register_operand" "d")))]
"TARGET_MAC || TARGET_SCORE7D"
"clz %0, %1"
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
(define_insn "sffs"
[(set (match_operand:SI 0 "register_operand" "=d")
(unspec:SI [(match_operand:SI 1 "register_operand" "d")] SFFS))]
"TARGET_MAC || TARGET_SCORE7D"
"bitrev %0, %1, r0\;clz %0, %0\;addi %0, 0x1"
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
(define_expand "ffssi2"
[(set (match_operand:SI 0 "register_operand")
(ffs:SI (match_operand:SI 1 "register_operand")))]
"TARGET_MAC || TARGET_SCORE7D"
{
emit_insn (gen_sffs (operands[0], operands[1]));
emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_REG (CC_NZmode, CC_REGNUM),
gen_rtx_COMPARE (CC_NZmode, operands[0],
GEN_INT (33))));
emit_insn (gen_movsicc_internal (operands[0],
gen_rtx_fmt_ee (EQ, VOIDmode, operands[0], GEN_INT (33)),
GEN_INT (0),
operands[0]));
DONE;
})
(define_peephole2
[(set (match_operand:SI 0 "loreg_operand" "")
(match_operand:SI 1 "register_operand" ""))
(set (match_operand:SI 2 "hireg_operand" "")
(match_operand:SI 3 "register_operand" ""))]
"TARGET_MAC || TARGET_SCORE7D"
[(parallel
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2) (match_dup 3))])])
(define_peephole2
[(set (match_operand:SI 0 "hireg_operand" "")
(match_operand:SI 1 "register_operand" ""))
(set (match_operand:SI 2 "loreg_operand" "")
(match_operand:SI 3 "register_operand" ""))]
"TARGET_MAC || TARGET_SCORE7D"
[(parallel
[(set (match_dup 2) (match_dup 3))
(set (match_dup 0) (match_dup 1))])])
(define_insn "movtohilo"
[(parallel
[(set (match_operand:SI 0 "loreg_operand" "=l")
(match_operand:SI 1 "register_operand" "d"))
(set (match_operand:SI 2 "hireg_operand" "=h")
(match_operand:SI 3 "register_operand" "d"))])]
"TARGET_MAC || TARGET_SCORE7D"
"mtcehl %3, %1"
[(set_attr "type" "fce")
(set_attr "mode" "SI")])
(define_insn "mulsi3addsi"
[(set (match_operand:SI 0 "register_operand" "=l,l,d")
(plus:SI (mult:SI (match_operand:SI 2 "register_operand" "d,d,d")
(match_operand:SI 3 "register_operand" "d,d,d"))
(match_operand:SI 1 "register_operand" "0,d,l")))
(clobber (reg:SI HI_REGNUM))]
"TARGET_MAC || TARGET_SCORE7D"
"@
mad %2, %3
mtcel%S1 %1\;mad %2, %3
mad %2, %3\;mfcel%S0 %0"
[(set_attr "mode" "SI")])
(define_insn "mulsi3subsi"
[(set (match_operand:SI 0 "register_operand" "=l,l,d")
(minus:SI (match_operand:SI 1 "register_operand" "0,d,l")
(mult:SI (match_operand:SI 2 "register_operand" "d,d,d")
(match_operand:SI 3 "register_operand" "d,d,d"))))
(clobber (reg:SI HI_REGNUM))]
"TARGET_MAC || TARGET_SCORE7D"
"@
msb %2, %3
mtcel%S1 %1\;msb %2, %3
msb %2, %3\;mfcel%S0 %0"
[(set_attr "mode" "SI")])
(define_insn "mulsidi3adddi"
[(set (match_operand:DI 0 "register_operand" "=x")
(plus:DI (mult:DI
(sign_extend:DI (match_operand:SI 2 "register_operand" "%d"))
(sign_extend:DI (match_operand:SI 3 "register_operand" "d")))
(match_operand:DI 1 "register_operand" "0")))]
"TARGET_MAC || TARGET_SCORE7D"
"mad %2, %3"
[(set_attr "mode" "DI")])
(define_insn "umulsidi3adddi"
[(set (match_operand:DI 0 "register_operand" "=x")
(plus:DI (mult:DI
(zero_extend:DI (match_operand:SI 2 "register_operand" "%d"))
(zero_extend:DI (match_operand:SI 3 "register_operand" "d")))
(match_operand:DI 1 "register_operand" "0")))]
"TARGET_MAC || TARGET_SCORE7D"
"madu %2, %3"
[(set_attr "mode" "DI")])
(define_insn "mulsidi3subdi"
[(set (match_operand:DI 0 "register_operand" "=x")
(minus:DI
(match_operand:DI 1 "register_operand" "0")
(mult:DI
(sign_extend:DI (match_operand:SI 2 "register_operand" "%d"))
(sign_extend:DI (match_operand:SI 3 "register_operand" "d")))))]
"TARGET_MAC || TARGET_SCORE7D"
"msb %2, %3"
[(set_attr "mode" "DI")])
(define_insn "umulsidi3subdi"
[(set (match_operand:DI 0 "register_operand" "=x")
(minus:DI
(match_operand:DI 1 "register_operand" "0")
(mult:DI (zero_extend:DI
(match_operand:SI 2 "register_operand" "%d"))
(zero_extend:DI
(match_operand:SI 3 "register_operand" "d")))))]
"TARGET_MAC || TARGET_SCORE7D"
"msbu %2, %3"
[(set_attr "mode" "DI")])
gcc/config/score/mul-div.S
...@@ -14,8 +14,8 @@ ...@@ -14,8 +14,8 @@
License for more details. License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */ <http://www.gnu.org/licenses/>. */
#define ra r3 #define ra r3
#define a0 r4 #define a0 r4
...@@ -34,6 +34,10 @@ ...@@ -34,6 +34,10 @@
#if !defined(L_mulsi3) && !defined(L_divsi3) #if !defined(L_mulsi3) && !defined(L_divsi3)
.text .text
.global _flush_cache .global _flush_cache
#ifdef __score3__
_flush_cache:
br r3
#else
_flush_cache: _flush_cache:
srli r9, r5, 4 srli r9, r5, 4
mv r8, r4 mv r8, r4
...@@ -70,6 +74,7 @@ _flush_cache: ...@@ -70,6 +74,7 @@ _flush_cache:
bcnz 2b bcnz 2b
br r3 br r3
#endif #endif
#endif
/* FUNCTION /* FUNCTION
(U) INT32 v0 = __mulsi3 ((U) INT32 a0, (U) INT32 a1); (U) INT32 v0 = __mulsi3 ((U) INT32 a0, (U) INT32 a1);
...@@ -205,6 +210,10 @@ __modsi3: ...@@ -205,6 +210,10 @@ __modsi3:
.set pic .set pic
.text .text
.global _flush_cache .global _flush_cache
#ifdef __score3__
_flush_cache:
br r3
#else
_flush_cache: _flush_cache:
addi r0, -8 # pic used addi r0, -8 # pic used
.cpload r29 # pic used .cpload r29 # pic used
...@@ -245,6 +254,7 @@ _flush_cache: ...@@ -245,6 +254,7 @@ _flush_cache:
addi r0, 8 # pic used addi r0, 8 # pic used
br r3 br r3
#endif #endif
#endif
/* FUNCTION /* FUNCTION
(U) INT32 v0 = __mulsi3 ((U) INT32 a0, (U) INT32 a1); (U) INT32 v0 = __mulsi3 ((U) INT32 a0, (U) INT32 a1);
...@@ -345,7 +355,6 @@ __umodsi3: ...@@ -345,7 +355,6 @@ __umodsi3:
.cpload r29 # pic used .cpload r29 # pic used
li t1, 0 li t1, 0
mv t3, ra mv t3, ra
# jl __udivsi3
la r29, __udivsi3 la r29, __udivsi3
brl r29 brl r29
mv r4, a1 mv r4, a1
...@@ -374,7 +383,6 @@ __divsi3: ...@@ -374,7 +383,6 @@ __divsi3:
.cpload r29 # pic used .cpload r29 # pic used
mv t3, ra mv t3, ra
xor t2, a0, a1 xor t2, a0, a1
# jl __orgsi3
la r29, __orgsi3 la r29, __orgsi3
brl r29 brl r29
__divsi3_adjust: __divsi3_adjust:
...@@ -394,7 +402,6 @@ __modsi3: ...@@ -394,7 +402,6 @@ __modsi3:
.cpload r29 # pic used .cpload r29 # pic used
mv t3, ra mv t3, ra
mv t2, a0 mv t2, a0
# jl __orgsi3
la r29, __orgsi3 la r29, __orgsi3
brl r29 brl r29
mv r4, a1 mv r4, a1
......
gcc/config/score/predicates.md
...@@ -17,16 +17,44 @@ ...@@ -17,16 +17,44 @@
;; along with GCC; see the file COPYING3. If not see ;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. ;; <http://www.gnu.org/licenses/>.
(define_predicate "const_uimm5"
(match_code "const_int")
{
return IMM_IN_RANGE (INTVAL (op), 5, 0);
})
(define_predicate "const_simm12"
(match_code "const_int")
{
return IMM_IN_RANGE (INTVAL (op), 12, 1);
})
(define_predicate "const_simm15"
(match_code "const_int")
{
return IMM_IN_RANGE (INTVAL (op), 15, 1);
})
(define_predicate "arith_operand" (define_predicate "arith_operand"
(ior (match_code "const_int") (ior (match_code "const_int")
(match_operand 0 "register_operand"))) (match_operand 0 "register_operand")))
(define_predicate "score_register_operand"
(match_code "reg,subreg")
{
if (GET_CODE (op) == SUBREG)
op = SUBREG_REG (op);
return (GET_CODE (op) == REG)
&& (REGNO (op) != CC_REGNUM);
})
(define_predicate "const_call_insn_operand" (define_predicate "const_call_insn_operand"
(match_code "const,symbol_ref,label_ref") (match_code "const,symbol_ref,label_ref")
{ {
enum score_symbol_type symbol_type; enum score_symbol_type symbol_type;
return (mda_symbolic_constant_p (op, &symbol_type) return (score_symbolic_constant_p (op, &symbol_type)
&& (symbol_type == SYMBOL_GENERAL)); && (symbol_type == SYMBOL_GENERAL));
}) })
...@@ -34,12 +62,6 @@ ...@@ -34,12 +62,6 @@
(ior (match_operand 0 "const_call_insn_operand") (ior (match_operand 0 "const_call_insn_operand")
(match_operand 0 "register_operand"))) (match_operand 0 "register_operand")))
(define_predicate "const_uimm5"
(match_code "const_int")
{
return IMM_IN_RANGE (INTVAL (op), 5, 0);
})
(define_predicate "hireg_operand" (define_predicate "hireg_operand"
(and (match_code "reg") (and (match_code "reg")
(match_test "REGNO (op) == HI_REGNUM"))) (match_test "REGNO (op) == HI_REGNUM")))
...@@ -62,15 +84,73 @@ ...@@ -62,15 +84,73 @@
(define_predicate "branch_nz_operator" (define_predicate "branch_nz_operator"
(match_code "eq,ne,lt,ge")) (match_code "eq,ne,lt,ge"))
(define_predicate "const_simm12" (define_predicate "score_load_multiple_operation"
(match_code "const_int") (match_code "parallel")
{ {
return IMM_IN_RANGE (INTVAL (op), 12, 1); int count = XVECLEN (op, 0);
int dest_regno;
rtx src_addr;
int i;
/* Perform a quick check so we don't blow up below. */
if (count <= 1
|| GET_CODE (XVECEXP (op, 0, 0)) != SET
|| GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
|| GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
return 0;
dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
for (i = 1; i < count; i++)
{
rtx elt = XVECEXP (op, 0, i);
if (GET_CODE (elt) != SET
|| GET_CODE (SET_DEST (elt)) != REG
|| GET_MODE (SET_DEST (elt)) != SImode
|| REGNO (SET_DEST (elt)) != (unsigned) (dest_regno + i)
|| GET_CODE (SET_SRC (elt)) != MEM
|| GET_MODE (SET_SRC (elt)) != SImode
|| GET_CODE (XEXP (SET_SRC (elt), 0)) != POST_INC)
return 0;
}
return 1;
}) })
(define_predicate "const_simm15" (define_predicate "score_store_multiple_operation"
(match_code "const_int") (match_code "parallel")
{ {
return IMM_IN_RANGE (INTVAL (op), 15, 1); int count = XVECLEN (op, 0);
int src_regno;
rtx dest_addr;
int i;
/* Perform a quick check so we don't blow up below. */
if (count <= 1
|| GET_CODE (XVECEXP (op, 0, 0)) != SET
|| GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
|| GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
return 0;
src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
for (i = 1; i < count; i++)
{
rtx elt = XVECEXP (op, 0, i);
if (GET_CODE (elt) != SET
|| GET_CODE (SET_SRC (elt)) != REG
|| GET_MODE (SET_SRC (elt)) != SImode
|| REGNO (SET_SRC (elt)) != (unsigned) (src_regno + i)
|| GET_CODE (SET_DEST (elt)) != MEM
|| GET_MODE (SET_DEST (elt)) != SImode
|| GET_CODE (XEXP (SET_DEST (elt), 0)) != PRE_DEC)
return 0;
}
return 1;
}) })
gcc/config/score/score-conv.h
...@@ -17,11 +17,16 @@ ...@@ -17,11 +17,16 @@
along with GCC; see the file COPYING3. If not see along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */ <http://www.gnu.org/licenses/>. */
#ifndef SCORE_CONV_0601 #ifndef GCC_SCORE_CONV_H
#define SCORE_CONV_0601 #define GCC_SCORE_CONV_H
extern int target_flags; extern int target_flags;
/* Define the information needed to generate branch insns. This is
stored from the compare operation. */
extern GTY(()) rtx cmp_op0;
extern GTY(()) rtx cmp_op1;
#define GP_REG_FIRST 0U #define GP_REG_FIRST 0U
#define GP_REG_LAST 31U #define GP_REG_LAST 31U
#define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1U) #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1U)
...@@ -40,47 +45,38 @@ extern int target_flags; ...@@ -40,47 +45,38 @@ extern int target_flags;
#define GP_REG_P(REGNO) REG_CONTAIN (REGNO, GP_REG_FIRST, GP_REG_NUM) #define GP_REG_P(REGNO) REG_CONTAIN (REGNO, GP_REG_FIRST, GP_REG_NUM)
#define G8_REG_P(REGNO) REG_CONTAIN (REGNO, GP_REG_FIRST, 8)
#define G16_REG_P(REGNO) REG_CONTAIN (REGNO, GP_REG_FIRST, 16) #define G16_REG_P(REGNO) REG_CONTAIN (REGNO, GP_REG_FIRST, 16)
#define CE_REG_P(REGNO) REG_CONTAIN (REGNO, CE_REG_FIRST, CE_REG_NUM) #define CE_REG_P(REGNO) REG_CONTAIN (REGNO, CE_REG_FIRST, CE_REG_NUM)
#define UIMM_IN_RANGE(V, W) ((V) >= 0 && (V) < ((HOST_WIDE_INT) 1 << (W))) #define GR_REG_CLASS_P(C) ((C) == G16_REGS || (C) == G32_REGS)
#define SP_REG_CLASS_P(C) \
((C) == CN_REG || (C) == LC_REG || (C) == SC_REG || (C) == SP_REGS)
#define CP_REG_CLASS_P(C) \
((C) == CP1_REGS || (C) == CP2_REGS || (C) == CP3_REGS || (C) == CPA_REGS)
#define CE_REG_CLASS_P(C) \
((C) == HI_REG || (C) == LO_REG || (C) == CE_REGS)
#define UIMM_IN_RANGE(V, W) ((V) >= 0 && (V) < ((HOST_WIDE_INT) 1 << (W)))
#define SIMM_IN_RANGE(V, W) \ #define SIMM_IN_RANGE(V, W) \
((V) >= (-1 * ((HOST_WIDE_INT) 1 << ((W) - 1))) \ ((V) >= (-1 * ((HOST_WIDE_INT) 1 << ((W) - 1))) \
&& (V) < (1 * ((HOST_WIDE_INT) 1 << ((W) - 1)))) && (V) < (1 * ((HOST_WIDE_INT) 1 << ((W) - 1))))
#define IMM_IN_RANGE(V, W, S) \ #define IMM_IN_RANGE(V, W, S) \
((S) ? SIMM_IN_RANGE (V, W) : UIMM_IN_RANGE (V, W)) ((S) ? SIMM_IN_RANGE (V, W) : UIMM_IN_RANGE (V, W))
#define IMM_IS_POW_OF_2(V, E1, E2) \ #define IMM_IS_POW_OF_2(V, E1, E2) \
((V) >= ((unsigned HOST_WIDE_INT) 1 << (E1)) \ ((V) >= ((unsigned HOST_WIDE_INT) 1 << (E1)) \
&& (V) <= ((unsigned HOST_WIDE_INT) 1 << (E2)) \ && (V) <= ((unsigned HOST_WIDE_INT) 1 << (E2)) \
&& ((V) & ((V) - 1)) == 0) && ((V) & ((V) - 1)) == 0)
#define SCORE_STACK_ALIGN(LOC) (((LOC) + 3) & ~3)
#define SCORE_MAX_FIRST_STACK_STEP (0x3ff0)
#define SCORE_SDATA_MAX score_sdata_max ()
#define DEFAULT_SDATA_MAX 8
#define CONST_HIGH_PART(VALUE) \
(((VALUE) + 0x8000) & ~(unsigned HOST_WIDE_INT) 0xffff)
#define CONST_LOW_PART(VALUE) ((VALUE) - CONST_HIGH_PART (VALUE))
#define PROLOGUE_TEMP_REGNUM (GP_REG_FIRST + 8)
#define EPILOGUE_TEMP_REGNUM (GP_REG_FIRST + 8)
enum score_symbol_type enum score_symbol_type
{ {
SYMBOL_GENERAL, SYMBOL_GENERAL,
SYMBOL_SMALL_DATA /* The symbol refers to something in a small data section. */ SYMBOL_SMALL_DATA /* The symbol refers to something in a small data section */
}; };
int score_sdata_max (void);
#endif #endif
gcc/config/score/score7.md → gcc/config/score/score-generic.md
;; Machine description for Sunplus S+CORE ;; Machine description for Sunplus S+CORE
;; Sunplus S+CORE 7 Pipeline Description ;; Sunplus S+CORE Pipeline Description
;; Copyright (C) 2005, 2007 ;; Copyright (C) 2005, 2007
;; Free Software Foundation, Inc. ;; Free Software Foundation, Inc.
;; Contributed by Sunnorth. ;; Contributed by Sunnorth.
......
gcc/config/score/score-mdaux.h deleted 100644 → 0
/* score-mdaux.h for Sunplus S+CORE processor
Copyright (C) 2005, 2007 Free Software Foundation, Inc.
Contributed by Sunnorth
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef SCORE_MDAUX_0621
#define SCORE_MDAUX_0621
/* Machine Auxiliary Functions. */
enum score_address_type
{
ADD_REG,
ADD_CONST_INT,
ADD_SYMBOLIC
};
#ifdef RTX_CODE
struct score_address_info
{
enum score_address_type type;
rtx reg;
rtx offset;
enum rtx_code code;
enum score_symbol_type symbol_type;
};
#endif
struct score_frame_info
{
HOST_WIDE_INT total_size; /* bytes that the entire frame takes up */
HOST_WIDE_INT var_size; /* bytes that variables take up */
HOST_WIDE_INT args_size; /* bytes that outgoing arguments take up */
HOST_WIDE_INT gp_reg_size; /* bytes needed to store gp regs */
HOST_WIDE_INT gp_sp_offset; /* offset from new sp to store gp registers */
HOST_WIDE_INT cprestore_size; /* # bytes that the .cprestore slot takes up */
unsigned int mask; /* mask of saved gp registers */
int num_gp; /* number of gp registers saved */
};
typedef void (*score_save_restore_fn) (rtx, rtx);
int mda_valid_base_register_p (rtx x, int strict);
#ifdef RTX_CODE
int mda_classify_address (struct score_address_info *info,
enum machine_mode mode, rtx x, int strict);
struct score_frame_info *mda_compute_frame_size (HOST_WIDE_INT size);
struct score_frame_info *mda_cached_frame (void);
void mda_gen_cmp (enum machine_mode mode);
#endif
int mda_symbolic_constant_p (rtx x, enum score_symbol_type *symbol_type);
int mda_bp (void);
/* Machine Expand. */
void mdx_prologue (void);
void mdx_epilogue (int sibcall_p);
void mdx_movsicc (rtx *ops);
void mdx_call (rtx *ops, bool sibcall);
void mdx_call_value (rtx *ops, bool sibcall);
/* Machine Split. */
void mds_movdi (rtx *ops);
void mds_zero_extract_andi (rtx *ops);
/* Machine Print. */
enum mda_mem_unit {MDA_BYTE = 0, MDA_HWORD = 1, MDA_WORD = 2};
#define MDA_ALIGN_UNIT(V, UNIT) !(V & ((1 << UNIT) - 1))
const char * mdp_linsn (rtx *ops, enum mda_mem_unit unit, bool sign);
const char * mdp_sinsn (rtx *ops, enum mda_mem_unit unit);
const char * mdp_select_add_imm (rtx *ops, bool set_cc);
const char * mdp_select (rtx *ops, const char *inst_pre,
bool commu, const char *letter, bool set_cc);
const char * mdp_limm (rtx *ops);
const char * mdp_move (rtx *ops);
/* Machine unaligned memory load/store. */
bool mdx_unaligned_load (rtx* ops);
bool mdx_unaligned_store (rtx* ops);
bool mdx_block_move (rtx* ops);
#endif
gcc/config/score/score-protos.h
...@@ -17,76 +17,80 @@ ...@@ -17,76 +17,80 @@
along with GCC; see the file COPYING3. If not see along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */ <http://www.gnu.org/licenses/>. */
#ifndef __SCORE_PROTOS_H__ #ifndef GCC_SCORE_PROTOS_H
#define __SCORE_PROTOS_H__ #define GCC_SCORE_PROTOS_H
extern enum reg_class score_char_to_class[]; /* Machine Print. */
enum score_mem_unit {SCORE_BYTE = 0, SCORE_HWORD = 1, SCORE_WORD = 2};
void score_override_options (void);
#define SCORE_ALIGN_UNIT(V, UNIT) !(V & ((1 << UNIT) - 1))
void score_init_expanders (void);
extern void score_gen_cmp (enum machine_mode mode);
int score_hard_regno_mode_ok (unsigned int, enum machine_mode); extern void score_prologue (void);
extern void score_epilogue (int sibcall_p);
int score_reg_class (int regno); extern void score_call (rtx *ops, bool sib);
extern void score_call_value (rtx *ops, bool sib);
enum reg_class score_preferred_reload_class (rtx x, enum reg_class class); extern void score_movdi (rtx *ops);
extern void score_zero_extract_andi (rtx *ops);
enum reg_class score_secondary_reload_class (enum reg_class class, extern const char * score_linsn (rtx *ops, enum score_mem_unit unit, bool sign);
enum machine_mode mode, rtx x); extern const char * score_sinsn (rtx *ops, enum score_mem_unit unit);
extern const char * score_limm (rtx *ops);
int score_const_ok_for_letter_p (HOST_WIDE_INT value, char c); extern const char * score_move (rtx *ops);
extern bool score_unaligned_load (rtx* ops);
int score_extra_constraint (rtx op, char c); extern bool score_unaligned_store (rtx* ops);
extern bool score_block_move (rtx* ops);
rtx score_return_addr (int count, rtx frame); extern int score_address_cost (rtx addr);
extern rtx score_function_arg (const CUMULATIVE_ARGS *cum,
HOST_WIDE_INT score_initial_elimination_offset (int from, int to); enum machine_mode mode,
tree type, int named);
rtx score_function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode, extern int score_address_p (enum machine_mode mode, rtx x, int strict);
tree type, int named); extern int score_reg_class (int regno);
extern int score_register_move_cost (enum machine_mode mode, enum reg_class to,
int score_arg_partial_nregs (const CUMULATIVE_ARGS *cum, enum reg_class from);
enum machine_mode mode, tree type, int named); extern int score_hard_regno_mode_ok (unsigned int, enum machine_mode);
extern int score_const_ok_for_letter_p (HOST_WIDE_INT value, char c);
void score_init_cumulative_args (CUMULATIVE_ARGS *cum, extern int score_extra_constraint (rtx op, char c);
tree fntype, rtx libname); extern rtx score_return_addr (int count, rtx frame);
extern void score_initialize_trampoline (rtx ADDR, rtx FUNC, rtx CHAIN);
void score_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode, extern int score_regno_mode_ok_for_base_p (int regno, int strict);
tree type, int named); extern void score_function_arg_advance (CUMULATIVE_ARGS *cum,
enum machine_mode mode,
rtx score_function_value (const_tree valtype, const_tree func, enum machine_mode mode); tree type, int named);
extern void score_init_cumulative_args (CUMULATIVE_ARGS *cum,
rtx score_va_arg (tree va_list, tree type); tree fntype, rtx libname);
extern void score_declare_object (FILE *stream, const char *name,
void score_initialize_trampoline (rtx ADDR, rtx FUNC, rtx CHAIN); const char *directive, const char *fmt, ...);
extern int score_output_external (FILE *file, tree decl, const char *name);
int score_address_p (enum machine_mode mode, rtx x, int strict); extern void score_override_options (void);
extern enum reg_class score_secondary_reload_class (enum reg_class class,
int score_legitimize_address (rtx *xloc); enum machine_mode mode,
rtx x);
int score_regno_mode_ok_for_base_p (int regno, int strict); extern rtx score_function_value (tree valtype, tree func,
enum machine_mode mode);
int score_register_move_cost (enum machine_mode mode, enum reg_class to, extern enum reg_class score_preferred_reload_class (rtx x,
enum reg_class from); enum reg_class class);
extern HOST_WIDE_INT score_initial_elimination_offset (int from, int to);
void score_declare_object (FILE *stream, const char *name, extern void score_print_operand (FILE *file, rtx op, int letter);
const char *directive, const char *fmt, ...) extern void score_print_operand_address (FILE *file, rtx addr);
ATTRIBUTE_PRINTF_4; extern int score_legitimize_address (rtx *xloc);
extern int score_arg_partial_bytes (CUMULATIVE_ARGS *cum,
void score_declare_object_name (FILE *stream, const char *name, tree decl); enum machine_mode mode,
tree type, bool named);
int score_output_external (FILE *file, tree decl, const char *name); extern int score_symbolic_constant_p (rtx x,
enum score_symbol_type *symbol_type);
void score_print_operand (FILE *file, rtx op, int letter); extern void score_movsicc (rtx *ops);
extern const char * score_select_add_imm (rtx *ops, bool set_cc);
void score_print_operand_address (FILE *file, rtx addr); extern const char * score_select (rtx *ops, const char *inst_pre, bool commu,
const char *letter, bool set_cc);
extern const char * score_output_casesi (rtx *operands);
extern const char * score_rpush (rtx *ops);
extern const char * score_rpop (rtx *ops);
extern bool score_rtx_costs (rtx x, int code, int outer_code, int *total);
#ifdef RTX_CODE #ifdef RTX_CODE
enum machine_mode score_select_cc_mode (enum rtx_code op, rtx x, rtx y); extern enum machine_mode score_select_cc_mode (enum rtx_code op, rtx x, rtx y);
#endif #endif
#include "score-mdaux.h" extern struct extern_list *extern_head;
#endif /* __SCORE_PROTOS_H__ */
#endif /* GCC_SCORE_PROTOS_H */
gcc/config/score/score-version.h deleted 100644 → 0
/* score-version.h for Sunplus S+CORE processor
Copyright (C) 2005, 2007 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#define SCORE_GCC_VERSION "1.2"
gcc/config/score/score.md
This source diff could not be displayed because it is too large. You can view the blob instead.
gcc/config/score/score.opt
...@@ -34,10 +34,6 @@ muls ...@@ -34,10 +34,6 @@ muls
Target RejectNegative Report Mask(ULS) Target RejectNegative Report Mask(ULS)
Enable unaligned load/store instruction Enable unaligned load/store instruction
mmac
Target RejectNegative Report Mask(MAC)
Enable mac instruction
mscore5 mscore5
Target RejectNegative Report Mask(SCORE5) Target RejectNegative Report Mask(SCORE5)
Support SCORE 5 ISA Support SCORE 5 ISA
...@@ -53,3 +49,15 @@ Support SCORE 7 ISA ...@@ -53,3 +49,15 @@ Support SCORE 7 ISA
mscore7d mscore7d
Target RejectNegative Report Mask(SCORE7D) Target RejectNegative Report Mask(SCORE7D)
Support SCORE 7D ISA Support SCORE 7D ISA
mscore3
Target RejectNegative Report Mask(SCORE3)
Support SCORE 3 ISA
mscore3d
Target RejectNegative Report Mask(SCORE3D)
Support SCORE 3d ISA
march=
Target RejectNegative Joined
Specify the name of the target architecture
gcc/config/score/score3.h 0 → 100644
/* score3.h for Sunplus S+CORE processor
Copyright (C) 2005, 2007 Free Software Foundation, Inc.
Contributed by Sunnorth
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_SCORE3_H
#define GCC_SCORE3_H
enum score3_address_type
{
SCORE3_ADD_REG,
SCORE3_ADD_CONST_INT,
SCORE3_ADD_SYMBOLIC
};
struct score3_frame_info
{
HOST_WIDE_INT total_size; /* bytes that the entire frame takes up */
HOST_WIDE_INT var_size; /* bytes that variables take up */
HOST_WIDE_INT args_size; /* bytes that outgoing arguments take up */
HOST_WIDE_INT gp_reg_size; /* bytes needed to store gp regs */
HOST_WIDE_INT gp_sp_offset; /* offset from new sp to store gp registers */
HOST_WIDE_INT cprestore_size; /* # bytes that the .cprestore slot takes up */
unsigned int mask; /* mask of saved gp registers */
int num_gp; /* number of gp registers saved */
};
struct score3_arg_info
{
unsigned int num_bytes; /* The argument's size in bytes */
unsigned int reg_words; /* The number of words passed in registers */
unsigned int reg_offset; /* The offset of the first register from */
/* GP_ARG_FIRST or FP_ARG_FIRST etc */
unsigned int stack_words; /* The number of words that must be passed */
/* on the stack */
unsigned int stack_offset; /* The offset from the start of the stack */
/* overflow area */
};
#ifdef RTX_CODE
struct score3_address_info
{
enum score3_address_type type;
rtx reg;
rtx offset;
enum rtx_code code;
enum score_symbol_type symbol_type;
};
#endif
#define SCORE3_SDATA_MAX score3_sdata_max
#define SCORE3_STACK_ALIGN(LOC) (((LOC) + 3) & ~3)
#define SCORE3_PROLOGUE_TEMP_REGNUM (GP_REG_FIRST + 8)
#define SCORE3_EPILOGUE_TEMP_REGNUM (GP_REG_FIRST + 8)
#define SCORE3_DEFAULT_SDATA_MAX 8
extern int score3_symbolic_constant_p (rtx x,
enum score_symbol_type *symbol_type);
extern bool score3_return_in_memory (tree type,
tree fndecl ATTRIBUTE_UNUSED);
extern void score3_output_mi_thunk (FILE *file,
tree thunk_fndecl ATTRIBUTE_UNUSED,
HOST_WIDE_INT delta,
HOST_WIDE_INT vcall_offset,
tree function);
extern int score3_legitimize_address (rtx *xloc);
extern void
score3_function_prologue (FILE *file,
HOST_WIDE_INT size ATTRIBUTE_UNUSED);
extern void
score3_function_epilogue (FILE *file,
HOST_WIDE_INT size ATTRIBUTE_UNUSED);
extern section *score3_select_rtx_section (enum machine_mode mode, rtx x,
unsigned HOST_WIDE_INT align);
extern bool score3_in_small_data_p (tree decl);
extern void score3_asm_file_start (void);
extern void score3_asm_file_end (void);
extern void score3_override_options (void);
extern int score3_reg_class (int regno);
extern enum reg_class score3_preferred_reload_class (rtx x ATTRIBUTE_UNUSED,
enum reg_class class);
extern enum reg_class
score3_secondary_reload_class (enum reg_class class,
enum machine_mode mode ATTRIBUTE_UNUSED,
rtx x);
extern int score3_const_ok_for_letter_p (HOST_WIDE_INT value, char c);
extern int score3_extra_constraint (rtx op, char c);
extern int score3_hard_regno_mode_ok (unsigned int regno,
enum machine_mode mode);
extern HOST_WIDE_INT
score3_initial_elimination_offset (int from,
int to ATTRIBUTE_UNUSED);
extern void score3_function_arg_advance (CUMULATIVE_ARGS *cum,
enum machine_mode mode,
tree type,
int named);
extern int score3_arg_partial_bytes (CUMULATIVE_ARGS *cum,
enum machine_mode mode,
tree type,
bool named);
extern rtx score3_function_arg (const CUMULATIVE_ARGS *cum,
enum machine_mode mode,
tree type,
int named);
extern rtx score3_function_value (tree valtype,
tree func ATTRIBUTE_UNUSED,
enum machine_mode mode);
extern void score3_initialize_trampoline (rtx ADDR, rtx FUNC, rtx CHAIN);
extern int score3_regno_mode_ok_for_base_p (int regno, int strict);
extern int score3_address_p (enum machine_mode mode, rtx x, int strict);
extern int score3_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
enum reg_class from,
enum reg_class to);
extern bool score3_rtx_costs (rtx x, int code, int outer_code, int *total);
extern int score3_address_cost (rtx addr);
extern int score3_output_external (FILE *file ATTRIBUTE_UNUSED,
tree decl,
const char *name);
extern rtx score3_return_addr (int count, rtx frame ATTRIBUTE_UNUSED);
extern void score3_print_operand (FILE *file, rtx op, int c);
extern void score3_print_operand_address (FILE *file, rtx x);
extern enum machine_mode
score3_select_cc_mode (enum rtx_code op, rtx x, rtx y);
extern void score3_prologue (void);
extern void score3_epilogue (int sibcall_p);
extern void score3_gen_cmp (enum machine_mode mode);
extern void score3_call (rtx *ops, bool sib);
extern void score3_call_value (rtx *ops, bool sib);
extern void score3_movsicc (rtx *ops);
extern void score3_movdi (rtx *ops);
extern void score3_zero_extract_andi (rtx *ops);
extern const char * score3_select_add_imm (rtx *ops, bool set_cc);
extern const char * score3_select (rtx *ops, const char *inst_pre, bool commu,
const char *letter, bool set_cc);
extern const char * score3_move (rtx *ops);
extern const char * score3_limm (rtx *ops);
extern const char *
score3_linsn (rtx *ops, enum score_mem_unit unit, bool sign);
extern const char *
score3_sinsn (rtx *ops, enum score_mem_unit unit);
extern const char * score3_output_casesi (rtx *operands);
extern const char * score3_rpush (rtx *ops);
extern const char * score3_rpop (rtx *ops);
#endif
gcc/config/score/score7.h 0 → 100644
/* score7.h for Sunplus S+CORE processor
Copyright (C) 2005, 2007 Free Software Foundation, Inc.
Contributed by Sunnorth
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_SCORE7_H
#define GCC_SCORE7_H
enum score7_address_type
{
SCORE7_ADD_REG,
SCORE7_ADD_CONST_INT,
SCORE7_ADD_SYMBOLIC
};
struct score7_frame_info
{
HOST_WIDE_INT total_size; /* bytes that the entire frame takes up */
HOST_WIDE_INT var_size; /* bytes that variables take up */
HOST_WIDE_INT args_size; /* bytes that outgoing arguments take up */
HOST_WIDE_INT gp_reg_size; /* bytes needed to store gp regs */
HOST_WIDE_INT gp_sp_offset; /* offset from new sp to store gp registers */
HOST_WIDE_INT cprestore_size; /* # bytes that the .cprestore slot takes up */
unsigned int mask; /* mask of saved gp registers */
int num_gp; /* number of gp registers saved */
};
struct score7_arg_info
{
unsigned int num_bytes; /* The argument's size in bytes */
unsigned int reg_words; /* The number of words passed in registers */
unsigned int reg_offset; /* The offset of the first register from */
/* GP_ARG_FIRST or FP_ARG_FIRST etc */
unsigned int stack_words; /* The number of words that must be passed */
/* on the stack */
unsigned int stack_offset; /* The offset from the start of the stack */
/* overflow area */
};
#ifdef RTX_CODE
struct score7_address_info
{
enum score7_address_type type;
rtx reg;
rtx offset;
enum rtx_code code;
enum score_symbol_type symbol_type;
};
#endif
#define SCORE7_SDATA_MAX score7_sdata_max
#define SCORE7_STACK_ALIGN(LOC) (((LOC) + 3) & ~3)
#define SCORE7_PROLOGUE_TEMP_REGNUM (GP_REG_FIRST + 8)
#define SCORE7_EPILOGUE_TEMP_REGNUM (GP_REG_FIRST + 8)
#define SCORE7_DEFAULT_SDATA_MAX 8
extern int score7_symbolic_constant_p (rtx x,
enum score_symbol_type *symbol_type);
extern bool score7_return_in_memory (tree type,
tree fndecl ATTRIBUTE_UNUSED);
extern void score7_output_mi_thunk (FILE *file,
tree thunk_fndecl ATTRIBUTE_UNUSED,
HOST_WIDE_INT delta,
HOST_WIDE_INT vcall_offset,
tree function);
extern int score7_legitimize_address (rtx *xloc);
extern void
score7_function_prologue (FILE *file,
HOST_WIDE_INT size ATTRIBUTE_UNUSED);
extern void
score7_function_epilogue (FILE *file,
HOST_WIDE_INT size ATTRIBUTE_UNUSED);
extern section *score7_select_rtx_section (enum machine_mode mode, rtx x,
unsigned HOST_WIDE_INT align);
extern bool score7_in_small_data_p (tree decl);
extern void score7_asm_file_start (void);
extern void score7_asm_file_end (void);
extern void score7_override_options (void);
extern int score7_reg_class (int regno);
extern enum reg_class score7_preferred_reload_class (rtx x ATTRIBUTE_UNUSED,
enum reg_class class);
extern enum
reg_class score7_secondary_reload_class (enum reg_class class,
enum machine_mode mode ATTRIBUTE_UNUSED,
rtx x);
extern int score7_const_ok_for_letter_p (HOST_WIDE_INT value, char c);
extern int score7_extra_constraint (rtx op, char c);
extern int score7_hard_regno_mode_ok (unsigned int regno,
enum machine_mode mode);
extern HOST_WIDE_INT
score7_initial_elimination_offset (int from,
int to ATTRIBUTE_UNUSED);
extern void score7_function_arg_advance (CUMULATIVE_ARGS *cum,
enum machine_mode mode,
tree type,
int named);
extern int score7_arg_partial_bytes (CUMULATIVE_ARGS *cum,
enum machine_mode mode,
tree type,
bool named);
extern rtx score7_function_arg (const CUMULATIVE_ARGS *cum,
enum machine_mode mode,
tree type,
int named);
extern rtx score7_function_value (tree valtype,
tree func ATTRIBUTE_UNUSED,
enum machine_mode mode);
extern void score7_initialize_trampoline (rtx ADDR, rtx FUNC, rtx CHAIN);
extern int score7_regno_mode_ok_for_base_p (int regno, int strict);
extern int score7_address_p (enum machine_mode mode, rtx x, int strict);
extern int score7_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
enum reg_class from,
enum reg_class to);
extern bool score7_rtx_costs (rtx x, int code, int outer_code, int *total);
extern int score7_address_cost (rtx addr);
extern int score7_output_external (FILE *file ATTRIBUTE_UNUSED,
tree decl,
const char *name);
extern rtx score7_return_addr (int count, rtx frame ATTRIBUTE_UNUSED);
extern void score7_print_operand (FILE *file, rtx op, int c);
extern void score7_print_operand_address (FILE *file, rtx x);
extern enum machine_mode score7_select_cc_mode (enum rtx_code op,
rtx x,
rtx y);
extern void score7_prologue (void);
extern void score7_epilogue (int sibcall_p);
extern void score7_gen_cmp (enum machine_mode mode);
extern void score7_call (rtx *ops, bool sib);
extern void score7_call_value (rtx *ops, bool sib);
extern void score7_movsicc (rtx *ops);
extern void score7_movdi (rtx *ops);
extern void score7_zero_extract_andi (rtx *ops);
extern const char * score7_select_add_imm (rtx *ops, bool set_cc);
extern const char * score7_select (rtx *ops, const char *inst_pre, bool commu,
const char *letter, bool set_cc);
extern const char * score7_move (rtx *ops);
extern const char * score7_limm (rtx *ops);
extern const char *
score7_linsn (rtx *ops, enum score_mem_unit unit, bool sign);
extern const char *
score7_sinsn (rtx *ops, enum score_mem_unit unit);
#endif
gcc/config/score/t-score-elf
# Additional Backend Files # Additional Backend Files
score-mdaux.o: $(srcdir)/config/score/score-mdaux.c $(CONFIG_H) $(SYSTEM_H) \ score7.o: $(srcdir)/config/score/score7.c $(CONFIG_H) $(SYSTEM_H) \
coretypes.h $(TM_H) $(RTL_H) output.h flags.h $(TREE_H) \ coretypes.h $(TM_H) $(RTL_H) output.h flags.h $(TREE_H) \
expr.h toplev.h $(TM_P_H) expr.h toplev.h $(TM_P_H)
$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
$(srcdir)/config/score/score-mdaux.c $(srcdir)/config/score/score7.c
score3.o: $(srcdir)/config/score/score3.c $(CONFIG_H) $(SYSTEM_H) \
coretypes.h $(TM_H) $(RTL_H) output.h flags.h $(TREE_H) \
expr.h toplev.h $(TM_P_H)
$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
$(srcdir)/config/score/score3.c
# Assemble startup files. # Assemble startup files.
$(T)crti.o: $(srcdir)/config/score/crti.asm $(GCC_PASSES) $(T)crti.o: $(srcdir)/config/score/crti.asm $(GCC_PASSES)
...@@ -35,8 +42,8 @@ dp-bit.c: $(srcdir)/config/fp-bit.c ...@@ -35,8 +42,8 @@ dp-bit.c: $(srcdir)/config/fp-bit.c
# without the $gp register. # without the $gp register.
TARGET_LIBGCC2_CFLAGS = -G 0 TARGET_LIBGCC2_CFLAGS = -G 0
MULTILIB_OPTIONS = mmac mel fPIC MULTILIB_OPTIONS = mscore3 mel
MULTILIB_MATCHES = fPIC=fpic MULTILIB_MATCHES = mscore3=march?score3
EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
......
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