Commit 24d8f6b6 by Will Schmidt Committed by Will Schmidt

fold-vec-mult-int128-p8.c: Update options

2017-10-10  Will Schmidt <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpc/fold-vec-mult-int128-p8.c: Update options
	* gcc.target/powerpc/fold-vec-mult-int128-p9.c: Update expected
	instruction list.

From-SVN: r253606
parent 35b82d26
2017-10-10 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-mult-int128-p8.c: Update options
* gcc.target/powerpc/fold-vec-mult-int128-p9.c: Update expected
instruction list.
2017-10-10 Nathan Sidwell <nathan@acm.org> 2017-10-10 Nathan Sidwell <nathan@acm.org>
PR preprocessor/82506 PR preprocessor/82506
......
...@@ -5,7 +5,8 @@ ...@@ -5,7 +5,8 @@
/* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-require-effective-target powerpc_p8vector_ok } */
/* { dg-require-effective-target int128 } */ /* { dg-require-effective-target int128 } */
/* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target lp64 } */
/* { dg-options "-mpower8-vector" } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
/* { dg-options "-mpower8-vector -mcpu=power8 -O2" } */
/* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */ /* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */
#include "altivec.h" #include "altivec.h"
...@@ -22,5 +23,5 @@ test2 (vector unsigned __int128 x, vector unsigned __int128 y) ...@@ -22,5 +23,5 @@ test2 (vector unsigned __int128 x, vector unsigned __int128 y)
return vec_mul (x, y); return vec_mul (x, y);
} }
/* { dg-final { scan-assembler-times "\[ \t\]mulld " 6 } } */ /* { dg-final { scan-assembler-times {\mmulld\M} 6 } } */
/* { dg-final { scan-assembler-times "\[ \t\]mulhdu" 2 } } */ /* { dg-final { scan-assembler-times {\mmulhdu\M} 2 } } */
...@@ -2,10 +2,10 @@ ...@@ -2,10 +2,10 @@
inputs produce the right results. */ inputs produce the right results. */
/* { dg-do compile } */ /* { dg-do compile } */
/* { dg-require-effective-target powerpc_float128_hw_ok } */ /* { dg-require-effective-target powerpc_p9vector_ok } */
/* { dg-require-effective-target int128 } */ /* { dg-require-effective-target int128 } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
/* { dg-options "-mcpu=power9 -O2" } */ /* { dg-options "-mpower9-vector -mcpu=power9 -O2" } */
/* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */ /* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */
#include "altivec.h" #include "altivec.h"
...@@ -22,4 +22,5 @@ test2 (vector unsigned __int128 x, vector unsigned __int128 y) ...@@ -22,4 +22,5 @@ test2 (vector unsigned __int128 x, vector unsigned __int128 y)
return vec_mul (x, y); return vec_mul (x, y);
} }
/* { dg-final { scan-assembler-times "\[ \t\]xsmulqp" 2 } } */ /* { dg-final { scan-assembler-times {\mmulld\M} 4 } } */
/* { dg-final { scan-assembler-times {\mmulhdu\M} 2 } } */
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