Commit 242e8072 by Richard Kenner

(ffssi2): Use gpc_reg_operand predicate.

(Some maskir patterns): Likewise.
(ffsdi2): Likewise.

From-SVN: r9032
parent 94d7001a
...@@ -1040,8 +1040,8 @@ ...@@ -1040,8 +1040,8 @@
[(set_attr "type" "compare")]) [(set_attr "type" "compare")])
(define_insn "ffssi2" (define_insn "ffssi2"
[(set (match_operand:SI 0 "register_operand" "=&r") [(set (match_operand:SI 0 "gpc_reg_operand" "=&r")
(ffs:SI (match_operand:SI 1 "register_operand" "r")))] (ffs:SI (match_operand:SI 1 "gpc_reg_operand" "r")))]
"" ""
"neg %0,%1\;and %0,%0,%1\;{cntlz|cntlzw} %0,%0\;{sfi|subfic} %0,%0,32" "neg %0,%1\;and %0,%0,%1\;{cntlz|cntlzw} %0,%0\;{sfi|subfic} %0,%0,32"
[(set_attr "length" "16")]) [(set_attr "length" "16")])
...@@ -1764,7 +1764,7 @@ ...@@ -1764,7 +1764,7 @@
"maskir %0,%3,%2") "maskir %0,%3,%2")
(define_insn "" (define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(ior:SI (and:SI (not:SI (match_operand:SI 2 "gpc_reg_operand" "r")) (ior:SI (and:SI (not:SI (match_operand:SI 2 "gpc_reg_operand" "r"))
(match_operand:SI 1 "gpc_reg_operand" "0")) (match_operand:SI 1 "gpc_reg_operand" "0"))
(and:SI (match_operand:SI 3 "gpc_reg_operand" "r") (and:SI (match_operand:SI 3 "gpc_reg_operand" "r")
...@@ -1813,7 +1813,7 @@ ...@@ -1813,7 +1813,7 @@
(and:SI (match_operand:SI 3 "gpc_reg_operand" "r") (and:SI (match_operand:SI 3 "gpc_reg_operand" "r")
(match_dup 2))) (match_dup 2)))
(const_int 0))) (const_int 0)))
(set (match_operand:SI 0 "register_operand" "=r") (set (match_operand:SI 0 "gpc_reg_operand" "=r")
(ior:SI (and:SI (not:SI (match_dup 2)) (match_dup 1)) (ior:SI (and:SI (not:SI (match_dup 2)) (match_dup 1))
(and:SI (match_dup 3) (match_dup 2))))] (and:SI (match_dup 3) (match_dup 2))))]
"TARGET_POWER" "TARGET_POWER"
...@@ -3559,8 +3559,8 @@ ...@@ -3559,8 +3559,8 @@
;; PowerPC64 DImode operations. ;; PowerPC64 DImode operations.
(define_insn "ffsdi2" (define_insn "ffsdi2"
[(set (match_operand:DI 0 "register_operand" "=&r") [(set (match_operand:DI 0 "gpc_reg_operand" "=&r")
(ffs:DI (match_operand:DI 1 "register_operand" "r")))] (ffs:DI (match_operand:DI 1 "gpc_reg_operand" "r")))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"neg %0,%1\;and %0,%0,%1\;cntlzd %0,%0\;subfic %0,%0,64" "neg %0,%1\;and %0,%0,%1\;cntlzd %0,%0\;subfic %0,%0,64"
[(set_attr "length" "16")]) [(set_attr "length" "16")])
......
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