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riscv-gcc-1
Commit 2414e0e2 by Jeff Law
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pa.c (move_operand): Relax "mode" test. 

Wed Jul 24 10:53:38 1996  Jeffrey A Law  (law@cygnus.com)

        * pa/pa.c (move_operand): Relax "mode" test.  Allow scaled
        indexed addressing modes.
        (output_fp_move_double): Tweak output strings to work with updated
        'F' and 'M' output modifiers.
        (print_operand): Collapse 'F' and 'M' into a single hunk of code.
        For auto-increment modes output "s,ma" and "s,mb".
        For scaled indexing modes output "x,s"
        For other addresses, output nothing for 'M' and "s" for 'F'.
        * pa.h (EXTRA_CONSTRAINT): Don't accept scaled indexed addresses
        for 'Q' and 'T'.  Do accept scaled indexed addresses for 'R'.
        (GO_IF_LEGITIMATE_ADDRESS): Accept scaled indexed addresses
        for SFmode and DFmode.
        * pa.md: Remove all scaled indexed load patterns.
        (movsi patterns): Accept scaled indexed addresses in some
        cases.  Update output strings for updated 'M' and 'F' output modifiers.
        (movhi, movqi, movsf, movdf, movdi patterns): Likewise.

From-SVN: r12558
parent 2cf55b55
Showing with 63 additions and 21 deletions
gcc/config/pa/pa.c
......@@ -270,8 +270,6 @@ move_operand (op, mode)
if (GET_CODE (op) == CONST_INT)
return cint_ok_for_move (INTVAL (op));
if (GET_MODE (op) != mode)
return 0;
if (GET_CODE (op) == SUBREG)
op = SUBREG_REG (op);
if (GET_CODE (op) != MEM)
......@@ -281,6 +279,22 @@ move_operand (op, mode)
if (GET_CODE (op) == LO_SUM)
return (register_operand (XEXP (op, 0), Pmode)
&& CONSTANT_P (XEXP (op, 1)));
/* Since move_operand is only used for source operands, we can always
allow scaled indexing! */
if (GET_CODE (op) == PLUS
&& ((GET_CODE (XEXP (op, 0)) == MULT
&& GET_CODE (XEXP (XEXP (op, 0), 0)) == REG
&& GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT
&& INTVAL (XEXP (XEXP (op, 0), 1)) == GET_MODE_SIZE (mode)
&& GET_CODE (XEXP (op, 1)) == REG)
|| (GET_CODE (XEXP (op, 1)) == MULT
&&GET_CODE (XEXP (XEXP (op, 1), 0)) == REG
&& GET_CODE (XEXP (XEXP (op, 1), 1)) == CONST_INT
&& INTVAL (XEXP (XEXP (op, 1), 1)) == GET_MODE_SIZE (mode)
&& GET_CODE (XEXP (op, 0)) == REG)))
return 1;
return memory_address_p (mode, op);
}
......@@ -1610,11 +1624,11 @@ output_fp_move_double (operands)
|| operands[1] == CONST0_RTX (GET_MODE (operands[0])))
output_asm_insn ("fcpy,dbl %r1,%0", operands);
else
output_asm_insn ("fldds%F1 %1,%0", operands);
output_asm_insn ("fldd%F1 %1,%0", operands);
}
else if (FP_REG_P (operands[1]))
{
output_asm_insn ("fstds%F0 %1,%0", operands);
output_asm_insn ("fstd%F0 %1,%0", operands);
}
else if (operands[1] == CONST0_RTX (GET_MODE (operands[0])))
{
......@@ -3324,6 +3338,7 @@ print_operand (file, x, code)
fputs ("i", file);
return;
case 'M':
case 'F':
switch (GET_CODE (XEXP (x, 0)))
{
case PRE_DEC:
......@@ -3334,22 +3349,16 @@ print_operand (file, x, code)
case POST_INC:
fputs ("s,ma", file);
break;
default:
break;
}
return;
case 'F':
switch (GET_CODE (XEXP (x, 0)))
{
case PRE_DEC:
case PRE_INC:
fputs (",mb", file);
break;
case POST_DEC:
case POST_INC:
fputs (",ma", file);
case PLUS:
if (GET_CODE (XEXP (XEXP (x, 0), 0)) == MULT
|| GET_CODE (XEXP (XEXP (x, 0), 1)) == MULT)
fputs ("x,s", file);
else if (code == 'F')
fputs ("s", file);
break;
default:
if (code == 'F')
fputs ("s", file);
break;
}
return;
......@@ -3392,7 +3401,18 @@ print_operand (file, x, code)
fprintf (file, "%d(0,%s)", size, reg_names [REGNO (base)]);
break;
default:
output_address (XEXP (x, 0));
if (GET_CODE (XEXP (x, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (x, 0), 0)) == MULT)
fprintf (file, "%s(0,%s)",
reg_names [REGNO (XEXP (XEXP (XEXP (x, 0), 0), 0))],
reg_names [REGNO (XEXP (XEXP (x, 0), 1))]);
else if (GET_CODE (XEXP (x, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (x, 0), 1)) == MULT)
fprintf (file, "%s(0,%s)",
reg_names [REGNO (XEXP (XEXP (XEXP (x, 0), 1), 0))],
reg_names [REGNO (XEXP (XEXP (x, 0), 0))]);
else
output_address (XEXP (x, 0));
break;
}
}
......
gcc/config/pa/pa.h
......@@ -1362,12 +1362,25 @@ extern struct rtx_def *hppa_builtin_saveregs ();
(IS_RELOADING_PSEUDO_P (OP) \
|| (GET_CODE (OP) == MEM \
&& memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
&& ! symbolic_memory_operand (OP, VOIDmode))) \
&& ! symbolic_memory_operand (OP, VOIDmode) \
&& !(GET_CODE (XEXP (OP, 0)) == PLUS \
&& (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
|| GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\
: ((C) == 'R' ? \
(GET_CODE (OP) == MEM \
&& GET_CODE (XEXP (OP, 0)) == PLUS \
&& (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \
|| GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \
&& (move_operand (OP, GET_MODE (OP)) \
|| memory_address_p (GET_MODE (OP), XEXP (OP, 0))))\
: ((C) == 'T' ? \
(GET_CODE (OP) == MEM \
/* Using DFmode forces only short displacements \
to be recognized as valid in reg+d addresses. */\
&& memory_address_p (DFmode, XEXP (OP, 0))) : 0))
&& memory_address_p (DFmode, XEXP (OP, 0)) \
&& !(GET_CODE (XEXP (OP, 0)) == PLUS \
&& (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
|| GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))) : 0)))
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
and check its validity for a certain class.
......@@ -1462,6 +1475,15 @@ extern struct rtx_def *hppa_builtin_saveregs ();
|| ((MODE) != SFmode && (MODE) != DFmode))) \
|| INT_5_BITS (index))) \
goto ADDR; \
if (base \
&& (mode == SFmode || mode == DFmode) \
&& GET_CODE (index) == MULT \
&& GET_CODE (XEXP (index, 0)) == REG \
&& REG_OK_FOR_BASE_P (XEXP (index, 0)) \
&& GET_CODE (XEXP (index, 1)) == CONST_INT \
&& INTVAL (XEXP (index, 1)) == (mode == SFmode ? 4 : 8)\
&& shadd_operand (XEXP (index, 1), VOIDmode)) \
goto ADDR; \
} \
else if (GET_CODE (X) == LO_SUM \
&& GET_CODE (XEXP (X, 0)) == REG \
......
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