re PR target/19065 (Make CRIS libstdc++ asms autoincrement-safe)

	PR target/19065.
	* config/cris/cris.h (EXTRA_CONSTRAINT_Q): Accept only (mem (reg)),
	not including (reg). Do not check for reg being CRIS_PC_REGNUM.
	(EXTRA_MEMORY_CONSTRAINT): Define as 'Q'.
	* config/cris/cris.md: Tweak comments referring to Q.
 	("cmpsi", "cmphi", "cmpqi", "*movsi_internal", "movhi")
	("movstricthi", "movqi", "movstrictqi", "movsf", "addsi3")
	("addhi3", "addqi3", "subsi3", "subhi3", "subqi3")
	("*expanded_andsi", "*expanded_andhi", "*andhi_lowpart", "andqi3")
	("*andqi_lowpart", "iorsi3", "iorhi3", "iorqi3", "uminsi3"):
	Insert spaces in constraints to align alternatives vertically for
	readability.
	("cmphi"): Ditto.  Add separate alternative for operand 0 "Q>",
	operand 1: "M".

From-SVN: r95647

gcc/ChangeLog

+2005-02-28  Hans-Peter Nilsson  <hp@axis.com>
+
+	PR target/19065.
+	* config/cris/cris.h (EXTRA_CONSTRAINT_Q): Accept only (mem (reg)),
+	not including (reg). Do not check for reg being CRIS_PC_REGNUM.
+	(EXTRA_MEMORY_CONSTRAINT): Define as 'Q'.
+	* config/cris/cris.md: Tweak comments referring to Q.
+ 	("cmpsi", "cmphi", "cmpqi", "*movsi_internal", "movhi")
+	("movstricthi", "movqi", "movstrictqi", "movsf", "addsi3")
+	("addhi3", "addqi3", "subsi3", "subhi3", "subqi3")
+	("*expanded_andsi", "*expanded_andhi", "*andhi_lowpart", "andqi3")
+	("*andqi_lowpart", "iorsi3", "iorhi3", "iorqi3", "uminsi3"):
+	Insert spaces in constraints to align alternatives vertically for
+	readability.
+	("cmphi"): Ditto.  Add separate alternative for operand 0 "Q>",
+	operand 1: "M".
+
 2005-02-27  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 
 	PR rtl-optimization/17728

gcc/config/cris/cris.h

@@ -772,14 +772,14 @@ enum reg_class {NO_REGS, ALL_REGS, LIM_REG_CLASSES};
   (C) == 'U' ? EXTRA_CONSTRAINT_U (X) :		\
   0)
 
+#define EXTRA_MEMORY_CONSTRAINT(X, STR) ((X) == 'Q')
+
 #define EXTRA_CONSTRAINT_Q(X)				\
  (							\
-  /* Slottable addressing modes:			\
-     A register?  FIXME: Unnecessary.  */		\
-  (BASE_P (X) && REGNO (X) != CRIS_PC_REGNUM)		\
-  /* Indirect register: [reg]?  */			\
-  || (GET_CODE (X) == MEM && BASE_P (XEXP (X, 0))	\
-      && REGNO (XEXP (X, 0)) != CRIS_PC_REGNUM)		\
+  /* Just an indirect register (happens to also be	\
+     "all" slottable memory addressing modes not	\
+     covered by other constraints, i.e. '>').  */	\
+  GET_CODE (X) == MEM && BASE_P (XEXP (X, 0))		\
  )
 
 #define EXTRA_CONSTRAINT_R(X)					\