Commit 22f23985 by Kazu Hirata Committed by Kazu Hirata

v850.c, [...]: Follow spelling conventions.

	* config/v850/v850.c, config/v850/v850.h, config/v850/v850.md:
	Follow spelling conventions.

From-SVN: r121567
parent 3b426391
...@@ -12,6 +12,9 @@ ...@@ -12,6 +12,9 @@
config/mt/mt.c, config/mt/mt.h, config/mt/mt.md: Follow config/mt/mt.c, config/mt/mt.h, config/mt/mt.md: Follow
spelling conventions. spelling conventions.
* config/v850/v850.c, config/v850/v850.h, config/v850/v850.md:
Follow spelling conventions.
2007-02-03 Douglas Gregor <doug.gregor@gmail.com> 2007-02-03 Douglas Gregor <doug.gregor@gmail.com>
* c-opts.c (c_common_post_options): If C++0x mode is enabled, don't * c-opts.c (c_common_post_options): If C++0x mode is enabled, don't
......
...@@ -854,10 +854,10 @@ output_move_single (rtx * operands) ...@@ -854,10 +854,10 @@ output_move_single (rtx * operands)
{ {
HOST_WIDE_INT value = INTVAL (src); HOST_WIDE_INT value = INTVAL (src);
if (CONST_OK_FOR_J (value)) /* Signed 5 bit immediate. */ if (CONST_OK_FOR_J (value)) /* Signed 5-bit immediate. */
return "mov %1,%0"; return "mov %1,%0";
else if (CONST_OK_FOR_K (value)) /* Signed 16 bit immediate. */ else if (CONST_OK_FOR_K (value)) /* Signed 16-bit immediate. */
return "movea lo(%1),%.,%0"; return "movea lo(%1),%.,%0";
else if (CONST_OK_FOR_L (value)) /* Upper 16 bits were set. */ else if (CONST_OK_FOR_L (value)) /* Upper 16 bits were set. */
...@@ -876,10 +876,10 @@ output_move_single (rtx * operands) ...@@ -876,10 +876,10 @@ output_move_single (rtx * operands)
const_double_split (src, &high, &low); const_double_split (src, &high, &low);
if (CONST_OK_FOR_J (high)) /* Signed 5 bit immediate. */ if (CONST_OK_FOR_J (high)) /* Signed 5-bit immediate. */
return "mov %F1,%0"; return "mov %F1,%0";
else if (CONST_OK_FOR_K (high)) /* Signed 16 bit immediate. */ else if (CONST_OK_FOR_K (high)) /* Signed 16-bit immediate. */
return "movea lo(%F1),%.,%0"; return "movea lo(%F1),%.,%0";
else if (CONST_OK_FOR_L (high)) /* Upper 16 bits were set. */ else if (CONST_OK_FOR_L (high)) /* Upper 16 bits were set. */
...@@ -1921,7 +1921,7 @@ Saved %d bytes via epilogue function (%d vs. %d) in function %s\n", ...@@ -1921,7 +1921,7 @@ Saved %d bytes via epilogue function (%d vs. %d) in function %s\n",
} }
} }
/* If no epilog save function is available, restore the registers the /* If no epilogue save function is available, restore the registers the
old fashioned way (one by one). */ old fashioned way (one by one). */
if (!restore_all) if (!restore_all)
{ {
......
...@@ -179,7 +179,7 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max]; ...@@ -179,7 +179,7 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
/* Allocation boundary (in *bits*) for storing arguments in argument list. */ /* Allocation boundary (in *bits*) for storing arguments in argument list. */
#define PARM_BOUNDARY 32 #define PARM_BOUNDARY 32
/* The stack goes in 32 bit lumps. */ /* The stack goes in 32-bit lumps. */
#define STACK_BOUNDARY 32 #define STACK_BOUNDARY 32
/* Allocation boundary (in *bits*) for the code of a function. /* Allocation boundary (in *bits*) for the code of a function.
...@@ -387,19 +387,19 @@ enum reg_class ...@@ -387,19 +387,19 @@ enum reg_class
#define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100) #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
/* zero */ /* zero */
#define CONST_OK_FOR_I(VALUE) ((VALUE) == 0) #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
/* 5 bit signed immediate */ /* 5-bit signed immediate */
#define CONST_OK_FOR_J(VALUE) ((unsigned) (VALUE) + 0x10 < 0x20) #define CONST_OK_FOR_J(VALUE) ((unsigned) (VALUE) + 0x10 < 0x20)
/* 16 bit signed immediate */ /* 16-bit signed immediate */
#define CONST_OK_FOR_K(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000) #define CONST_OK_FOR_K(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
/* valid constant for movhi instruction. */ /* valid constant for movhi instruction. */
#define CONST_OK_FOR_L(VALUE) \ #define CONST_OK_FOR_L(VALUE) \
(((unsigned) ((int) (VALUE) >> 16) + 0x8000 < 0x10000) \ (((unsigned) ((int) (VALUE) >> 16) + 0x8000 < 0x10000) \
&& CONST_OK_FOR_I ((VALUE & 0xffff))) && CONST_OK_FOR_I ((VALUE & 0xffff)))
/* 16 bit unsigned immediate */ /* 16-bit unsigned immediate */
#define CONST_OK_FOR_M(VALUE) ((unsigned)(VALUE) < 0x10000) #define CONST_OK_FOR_M(VALUE) ((unsigned)(VALUE) < 0x10000)
/* 5 bit unsigned immediate in shift instructions */ /* 5-bit unsigned immediate in shift instructions */
#define CONST_OK_FOR_N(VALUE) ((unsigned) (VALUE) <= 31) #define CONST_OK_FOR_N(VALUE) ((unsigned) (VALUE) <= 31)
/* 9 bit signed immediate for word multiply instruction. */ /* 9-bit signed immediate for word multiply instruction. */
#define CONST_OK_FOR_O(VALUE) ((unsigned) (VALUE) + 0x100 < 0x200) #define CONST_OK_FOR_O(VALUE) ((unsigned) (VALUE) + 0x100 < 0x200)
#define CONST_OK_FOR_P(VALUE) 0 #define CONST_OK_FOR_P(VALUE) 0
......
...@@ -185,7 +185,7 @@ ...@@ -185,7 +185,7 @@
}") }")
;; This is the same as the following pattern, except that it includes ;; This is the same as the following pattern, except that it includes
;; support for arbitrary 32 bit immediates. ;; support for arbitrary 32-bit immediates.
;; ??? This always loads addresses using hilo. If the only use of this address ;; ??? This always loads addresses using hilo. If the only use of this address
;; was in a load/store, then we would get smaller code if we only loaded the ;; was in a load/store, then we would get smaller code if we only loaded the
...@@ -409,7 +409,7 @@ ...@@ -409,7 +409,7 @@
;; ??? The scheduling info is probably wrong. ;; ??? The scheduling info is probably wrong.
;; ??? This instruction can also generate the 32 bit highpart, but using it ;; ??? This instruction can also generate the 32-bit highpart, but using it
;; may increase code size counter to the desired result. ;; may increase code size counter to the desired result.
;; ??? This instructions can also give a DImode result. ;; ??? This instructions can also give a DImode result.
...@@ -1646,7 +1646,7 @@ ...@@ -1646,7 +1646,7 @@
;; ---------------------------------------------------------------------- ;; ----------------------------------------------------------------------
;; HELPER INSTRUCTIONS for saving the prologue and epilog registers ;; HELPER INSTRUCTIONS for saving the prologue and epilogue registers
;; ---------------------------------------------------------------------- ;; ----------------------------------------------------------------------
;; This pattern will match a stack adjust RTX followed by any number of push ;; This pattern will match a stack adjust RTX followed by any number of push
......
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