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Commit 2290121c by Uros Bizjak Committed by Uros Bizjak
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re PR target/32961 (Gcc has different requirements for x86 shift xmm intrinsics) 

	PR target/32961
	* config/i386/i386.c (ix86_expand_builtin) [IX86_BUILTIN_PSLLWI128,
	IX86_BUILTIN_PSLLDI128, BUILTIN_PSLLQI128, IX86_BUILTIN_PSRAWI128,
	IX86_BUILTIN_PSRADI128, IX86_BUILTIN_PSRLWI128,
	IX86_BUILTIN_PSRLDI128, IX86_BUILTIN_PSRLQI128]: Do not require
	immediate shift value.
	config/i386/emmintrin.h (_mm_slli_epi16, _mm_slli_epi32,
	_mm_slli_epi64, _mm_srai_epi16, _mm_srai_epi32, _mm_srli_epi16,
	_mm_srli_epi32, _mm_srli_epi64): Remove 'const' from count argument.
	Remove macros for !__OPTIMIZE__ case.

testsuite/ChangeLog:

	PR target/32961
	* gcc.target/i386/pr32961.c: New testcase.
	* gcc.target/i386/sse-13.c: Remove __builtin_ia32_psllwi128,
	__builtin_ia32_psrlqi128, __builtin_ia32_psrlwi128,
	__builtin_ia32_psrldi128, __builtin_ia32_psrawi128,
	__builtin_ia32_psradi128, __builtin_ia32_psllqi128 and
	__builtin_ia32_pslldi128 defines.

From-SVN: r129403
parent 36dcec91
Showing with 56 additions and 96 deletions
gcc/ChangeLog
2007-10-17 Uros Bizjak <ubizjak@gmail.com>
PR target/32961
* config/i386/i386.c (ix86_expand_builtin) [IX86_BUILTIN_PSLLWI128,
IX86_BUILTIN_PSLLDI128, BUILTIN_PSLLQI128, IX86_BUILTIN_PSRAWI128,
IX86_BUILTIN_PSRADI128, IX86_BUILTIN_PSRLWI128,
IX86_BUILTIN_PSRLDI128, IX86_BUILTIN_PSRLQI128]: Do not require
immediate shift value.
config/i386/emmintrin.h (_mm_slli_epi16, _mm_slli_epi32,
_mm_slli_epi64, _mm_srai_epi16, _mm_srai_epi32, _mm_srli_epi16,
_mm_srli_epi32, _mm_srli_epi64): Remove 'const' from count argument.
Remove macros for !__OPTIMIZE__ case.
2007-10-17 Daniel Berlin <dberlin@dberlin.org>
* tree-ssa-structalias.c (rewrite_constraints): Don't test for
gcc/config/i386/emmintrin.h
......@@ -1113,51 +1113,35 @@ _mm_mul_epu32 (__m128i __A, __m128i __B)
return (__m128i)__builtin_ia32_pmuludq128 ((__v4si)__A, (__v4si)__B);
}
#ifdef __OPTIMIZE__
static __inline __m128i __attribute__((__always_inline__, __artificial__))
_mm_slli_epi16 (__m128i __A, const int __B)
_mm_slli_epi16 (__m128i __A, int __B)
{
return (__m128i)__builtin_ia32_psllwi128 ((__v8hi)__A, __B);
}
static __inline __m128i __attribute__((__always_inline__, __artificial__))
_mm_slli_epi32 (__m128i __A, const int __B)
_mm_slli_epi32 (__m128i __A, int __B)
{
return (__m128i)__builtin_ia32_pslldi128 ((__v4si)__A, __B);
}
static __inline __m128i __attribute__((__always_inline__, __artificial__))
_mm_slli_epi64 (__m128i __A, const int __B)
_mm_slli_epi64 (__m128i __A, int __B)
{
return (__m128i)__builtin_ia32_psllqi128 ((__v2di)__A, __B);
}
#else
#define _mm_slli_epi16(__A, __B) \
((__m128i)__builtin_ia32_psllwi128 ((__v8hi)(__A), __B))
#define _mm_slli_epi32(__A, __B) \
((__m128i)__builtin_ia32_pslldi128 ((__v4si)(__A), __B))
#define _mm_slli_epi64(__A, __B) \
((__m128i)__builtin_ia32_psllqi128 ((__v2di)(__A), __B))
#endif
#ifdef __OPTIMIZE__
static __inline __m128i __attribute__((__always_inline__, __artificial__))
_mm_srai_epi16 (__m128i __A, const int __B)
_mm_srai_epi16 (__m128i __A, int __B)
{
return (__m128i)__builtin_ia32_psrawi128 ((__v8hi)__A, __B);
}
static __inline __m128i __attribute__((__always_inline__, __artificial__))
_mm_srai_epi32 (__m128i __A, const int __B)
_mm_srai_epi32 (__m128i __A, int __B)
{
return (__m128i)__builtin_ia32_psradi128 ((__v4si)__A, __B);
}
#else
#define _mm_srai_epi16(__A, __B) \
((__m128i)__builtin_ia32_psrawi128 ((__v8hi)(__A), __B))
#define _mm_srai_epi32(__A, __B) \
((__m128i)__builtin_ia32_psradi128 ((__v4si)(__A), __B))
#endif
#ifdef __OPTIMIZE__
static __inline __m128i __attribute__((__always_inline__, __artificial__))
......@@ -1178,32 +1162,23 @@ _mm_slli_si128 (__m128i __A, const int __B)
((__m128i)__builtin_ia32_pslldqi128 (__A, (__B) * 8))
#endif
#ifdef __OPTIMIZE__
static __inline __m128i __attribute__((__always_inline__, __artificial__))
_mm_srli_epi16 (__m128i __A, const int __B)
_mm_srli_epi16 (__m128i __A, int __B)
{
return (__m128i)__builtin_ia32_psrlwi128 ((__v8hi)__A, __B);
}
static __inline __m128i __attribute__((__always_inline__, __artificial__))
_mm_srli_epi32 (__m128i __A, const int __B)
_mm_srli_epi32 (__m128i __A, int __B)
{
return (__m128i)__builtin_ia32_psrldi128 ((__v4si)__A, __B);
}
static __inline __m128i __attribute__((__always_inline__, __artificial__))
_mm_srli_epi64 (__m128i __A, const int __B)
_mm_srli_epi64 (__m128i __A, int __B)
{
return (__m128i)__builtin_ia32_psrlqi128 ((__v2di)__A, __B);
}
#else
#define _mm_srli_epi16(__A, __B) \
((__m128i)__builtin_ia32_psrlwi128 ((__v8hi)(__A), __B))
#define _mm_srli_epi32(__A, __B) \
((__m128i)__builtin_ia32_psrldi128 ((__v4si)(__A), __B))
#define _mm_srli_epi64(__A, __B) \
((__m128i)__builtin_ia32_psrlqi128 ((__v2di)(__A), __B))
#endif
static __inline __m128i __attribute__((__always_inline__, __artificial__))
_mm_sll_epi16 (__m128i __A, __m128i __B)
......
gcc/config/i386/i386.c
......@@ -20680,80 +20680,38 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
emit_insn (pat);
return target;
case IX86_BUILTIN_PSLLWI128:
icode = CODE_FOR_ashlv8hi3;
goto do_pshifti;
case IX86_BUILTIN_PSLLDI128:
icode = CODE_FOR_ashlv4si3;
goto do_pshifti;
case IX86_BUILTIN_PSLLQI128:
icode = CODE_FOR_ashlv2di3;
goto do_pshifti;
case IX86_BUILTIN_PSRAWI128:
icode = CODE_FOR_ashrv8hi3;
goto do_pshifti;
case IX86_BUILTIN_PSRADI128:
icode = CODE_FOR_ashrv4si3;
goto do_pshifti;
case IX86_BUILTIN_PSRLWI128:
icode = CODE_FOR_lshrv8hi3;
goto do_pshifti;
case IX86_BUILTIN_PSRLDI128:
icode = CODE_FOR_lshrv4si3;
goto do_pshifti;
case IX86_BUILTIN_PSRLQI128:
icode = CODE_FOR_lshrv2di3;
goto do_pshifti;
do_pshifti:
arg0 = CALL_EXPR_ARG (exp, 0);
arg1 = CALL_EXPR_ARG (exp, 1);
op0 = expand_normal (arg0);
op1 = expand_normal (arg1);
if (!CONST_INT_P (op1))
{
error ("shift must be an immediate");
return const0_rtx;
}
if (INTVAL (op1) < 0 || INTVAL (op1) > 255)
op1 = GEN_INT (255);
tmode = insn_data[icode].operand[0].mode;
mode1 = insn_data[icode].operand[1].mode;
if (! (*insn_data[icode].operand[1].predicate) (op0, mode1))
op0 = copy_to_reg (op0);
target = gen_reg_rtx (tmode);
pat = GEN_FCN (icode) (target, op0, op1);
if (!pat)
return 0;
emit_insn (pat);
return target;
case IX86_BUILTIN_PSLLW128:
case IX86_BUILTIN_PSLLWI128:
icode = CODE_FOR_ashlv8hi3;
goto do_pshift;
case IX86_BUILTIN_PSLLD128:
case IX86_BUILTIN_PSLLDI128:
icode = CODE_FOR_ashlv4si3;
goto do_pshift;
case IX86_BUILTIN_PSLLQ128:
case IX86_BUILTIN_PSLLQI128:
icode = CODE_FOR_ashlv2di3;
goto do_pshift;
case IX86_BUILTIN_PSRAW128:
case IX86_BUILTIN_PSRAWI128:
icode = CODE_FOR_ashrv8hi3;
goto do_pshift;
case IX86_BUILTIN_PSRAD128:
case IX86_BUILTIN_PSRADI128:
icode = CODE_FOR_ashrv4si3;
goto do_pshift;
case IX86_BUILTIN_PSRLW128:
case IX86_BUILTIN_PSRLWI128:
icode = CODE_FOR_lshrv8hi3;
goto do_pshift;
case IX86_BUILTIN_PSRLD128:
case IX86_BUILTIN_PSRLDI128:
icode = CODE_FOR_lshrv4si3;
goto do_pshift;
case IX86_BUILTIN_PSRLQ128:
case IX86_BUILTIN_PSRLQI128:
icode = CODE_FOR_lshrv2di3;
goto do_pshift;
do_pshift:
arg0 = CALL_EXPR_ARG (exp, 0);
arg1 = CALL_EXPR_ARG (exp, 1);
......@@ -20766,7 +20724,9 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
if (! (*insn_data[icode].operand[1].predicate) (op0, mode1))
op0 = copy_to_reg (op0);
op1 = simplify_gen_subreg (SImode, op1, GET_MODE (op1), 0);
if (!CONST_INT_P (op1))
op1 = simplify_gen_subreg (SImode, op1, GET_MODE (op1), 0);
if (! (*insn_data[icode].operand[2].predicate) (op1, SImode))
op1 = copy_to_reg (op1);
......
gcc/testsuite/ChangeLog
2007-10-17 Uros Bizjak <ubizjak@gmail.com>
PR target/32961
* gcc.target/i386/pr32961.c: New testcase.
* gcc.target/i386/sse-13.c: Remove __builtin_ia32_psllwi128,
__builtin_ia32_psrlqi128, __builtin_ia32_psrlwi128,
__builtin_ia32_psrldi128, __builtin_ia32_psrawi128,
__builtin_ia32_psradi128, __builtin_ia32_psllqi128 and
__builtin_ia32_pslldi128 defines.
2007-10-17 Christopher D. Rickett <crickett@lanl.gov>
PR fortran/33760
gcc/testsuite/gcc.target/i386/pr32961.c 0 → 100644
/* { dg-do compile } */
/* { dg-options "-O0 -msse2" } */
#include <xmmintrin.h>
void x (int n)
{
__m128i a;
a = _mm_slli_epi32 (a, n);
}
gcc/testsuite/gcc.target/i386/sse-12.c
/* Test that {,x,e,p,t,s,a}mmintrin.h, mm3dnow.h and mm_malloc.h are
usable with -O -std=c89 -pedantic-errors. */
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-do compile } */
/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -m3dnow -msse4.1 -msse5" } */
#include <bmmintrin.h>
......
gcc/testsuite/gcc.target/i386/sse-13.c
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-do compile } */
/* { dg-options "-O2 -msse4.1 -msse5 " } */
/* Test that the intrinsics compile with optimization. All of them are
......@@ -40,16 +40,8 @@
#define __builtin_ia32_palignr(X, Y, N) __builtin_ia32_palignr(X, Y, 8)
/* emmintrin.h */
#define __builtin_ia32_psllwi128(A, B) __builtin_ia32_psllwi128(A, 1)
#define __builtin_ia32_psrlqi128(A, B) __builtin_ia32_psrlqi128(A, 1)
#define __builtin_ia32_psrlwi128(A, B) __builtin_ia32_psrlwi128(A, 1)
#define __builtin_ia32_psrldi128(A, B) __builtin_ia32_psrldi128(A, 1)
#define __builtin_ia32_psrldqi128(A, B) __builtin_ia32_psrldqi128(A, 8)
#define __builtin_ia32_pslldqi128(A, B) __builtin_ia32_pslldqi128(A, 8)
#define __builtin_ia32_psrawi128(A, B) __builtin_ia32_psrawi128(A, 1)
#define __builtin_ia32_psradi128(A, B) __builtin_ia32_psradi128(A, 1)
#define __builtin_ia32_psllqi128(A, B) __builtin_ia32_psllqi128(A, 1)
#define __builtin_ia32_pslldi128(A, B) __builtin_ia32_pslldi128(A, 1)
#define __builtin_ia32_pshufhw(A, N) __builtin_ia32_pshufhw(A, 0)
#define __builtin_ia32_pshuflw(A, N) __builtin_ia32_pshuflw(A, 0)
#define __builtin_ia32_pshufd(A, N) __builtin_ia32_pshufd(A, 0)
......
gcc/testsuite/gcc.target/i386/sse-14.c
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
/* { dg-do compile } */
/* { dg-options "-O0 -msse4.1 -msse5" } */
/* Test that the intrinsics compile without optimization. All of them are
......
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