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Commit 227efe87 by Eric Botcazou Committed by Eric Botcazou
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sparc-protos.h (sparc_branch_cost): Declare. 

	* config/sparc/sparc-protos.h (sparc_branch_cost): Declare.
	* config/sparc/sparc.h (BRANCH_COST): Call sparc_branch_cost.
	* config/sparc/sparc.c (struct processor_costs): Add branch_cost field.
	(cypress_costs): Set it.
	(supersparc_costs): Likewise.
	(hypersparc_costs): Likewise.
	(leon_cost): Likewise.
	(leon3_costs): Likewise.
	(sparclet_costs): Likewise.
	(ultrasparc_costs): Likewise.
	(ultrasparc_costs): Likewise.
	(niagara_costs): Likewise.
	(niagara2_costs): Likewise.
	(niagara3_costs): Likewise.
	(niagara4_costs): Likewise.
	(niagara7_costs): Likewise.
	(m8_costs): Likewise.
	(TARGET_CAN_FOLLOW_JUMP): Define.
	(pass_work_around_errata::gate): Minor tweak.
	(sparc_option_override): Remove MASK_FSMULD mask for V7 processors.
	Do not set both MASK_VIS4 and MASK_VIS4B for M8 processor.
	Automaitcally clear MASK_FSMULD mask for V7 processors.
	(sparc_can_follow_jump): New static function.
	(output_ubranch): Deal with CROSSING_JUMP_P.
	(sparc_use_sched_lookahead): Rewrite using switch statement.
	(sparc_issue_rate): Reorder.
	(sparc_branch_cost): New function.

From-SVN: r264687
parent 7847bfcb
Showing with 168 additions and 84 deletions
gcc/ChangeLog
2018-09-28 Eric Botcazou <ebotcazou@adacore.com>
* config/sparc/sparc-protos.h (sparc_branch_cost): Declare.
* config/sparc/sparc.h (BRANCH_COST): Call sparc_branch_cost.
* config/sparc/sparc.c (struct processor_costs): Add branch_cost field.
(cypress_costs): Set it.
(supersparc_costs): Likewise.
(hypersparc_costs): Likewise.
(leon_cost): Likewise.
(leon3_costs): Likewise.
(sparclet_costs): Likewise.
(ultrasparc_costs): Likewise.
(ultrasparc_costs): Likewise.
(niagara_costs): Likewise.
(niagara2_costs): Likewise.
(niagara3_costs): Likewise.
(niagara4_costs): Likewise.
(niagara7_costs): Likewise.
(m8_costs): Likewise.
(TARGET_CAN_FOLLOW_JUMP): Define.
(pass_work_around_errata::gate): Minor tweak.
(sparc_option_override): Remove MASK_FSMULD mask for V7 processors.
Do not set both MASK_VIS4 and MASK_VIS4B for M8 processor.
Automaitcally clear MASK_FSMULD mask for V7 processors.
(sparc_can_follow_jump): New static function.
(output_ubranch): Deal with CROSSING_JUMP_P.
(sparc_use_sched_lookahead): Rewrite using switch statement.
(sparc_issue_rate): Reorder.
(sparc_branch_cost): New function.
2018-09-27 Martin Sebor <msebor@redhat.com>
* tree.h (tree_to_shwi): Add attribute nonnull and pure.
......
gcc/config/sparc/sparc-protos.h
......@@ -43,6 +43,7 @@ extern void sparc_override_options (void);
extern void sparc_output_scratch_registers (FILE *);
extern void sparc_target_macros (void);
extern void sparc_emit_membar_for_model (enum memmodel, int, int);
extern int sparc_branch_cost (bool, bool);
#ifdef RTX_CODE
extern machine_mode select_cc_mode (enum rtx_code, rtx, rtx);
......
gcc/config/sparc/sparc.h
......@@ -1496,41 +1496,10 @@ do { \
#define DITF_CONVERSION_LIBFUNCS 0
#define SUN_INTEGER_MULTIPLY_64 0
/* Provide the cost of a branch. For pre-v9 processors we use
a value of 3 to take into account the potential annulling of
the delay slot (which ends up being a bubble in the pipeline slot)
plus a cycle to take into consideration the instruction cache
effects.
On v9 and later, which have branch prediction facilities, we set
it to the depth of the pipeline as that is the cost of a
mispredicted branch.
On Niagara, normal branches insert 3 bubbles into the pipe
and annulled branches insert 4 bubbles.
On Niagara-2 and Niagara-3, a not-taken branch costs 1 cycle whereas
a taken branch costs 6 cycles.
The T4 Supplement specifies the branch latency at 2 cycles.
The M7 Supplement specifies the branch latency at 1 cycle. */
#define BRANCH_COST(speed_p, predictable_p) \
((sparc_cpu == PROCESSOR_V9 \
|| sparc_cpu == PROCESSOR_ULTRASPARC) \
? 7 \
: (sparc_cpu == PROCESSOR_ULTRASPARC3 \
? 9 \
: (sparc_cpu == PROCESSOR_NIAGARA \
? 4 \
: ((sparc_cpu == PROCESSOR_NIAGARA2 \
|| sparc_cpu == PROCESSOR_NIAGARA3) \
? 5 \
: (sparc_cpu == PROCESSOR_NIAGARA4 \
? 2 \
: (sparc_cpu == PROCESSOR_NIAGARA7 \
? 1 \
: 3))))))
/* A C expression for the cost of a branch instruction. A value of 1
is the default; other values are interpreted relative to that. */
#define BRANCH_COST(SPEED_P, PREDICTABLE_P) \
(sparc_branch_cost (SPEED_P, PREDICTABLE_P))
/* Control the assembler format that we output. */
......
gcc/testsuite/ChangeLog
2018-09-28 Eric Botcazou <ebotcazou@adacore.com>
* gcc.target/sparc/20160229-1.c: Minor tweak.
* gcc.target/sparc/cbcond-2.c: Likewise.
* gcc.target/sparc/movcc-1.c: Add -mcpu=v9 option.
* gcc.target/sparc/movcc-2.c: Minor tweak.
* gcc.target/sparc/overflow-3.c: Likewise.
* gcc.target/sparc/overflow-4.c: Add -mno-vis4 option.
* gcc.target/sparc/overflow-5.c: Minor tweak.
* gcc.target/sparc/setcc-4.c: Add -mno-vis4 option.
2018-09-27 Segher Boessenkool <segher@kernel.crashing.org>
* g++.dg/ext/altivec-6.C: Change the vec_splat second argument to a
......
gcc/testsuite/gcc.target/sparc/20160229-1.c
......@@ -2,8 +2,8 @@
/* Reported by John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> */
/* { dg-do run } */
/* { dg-options "-std=gnu99" }
/* { dg-require-effective-target lp64 } */
/* { dg-options "-std=gnu99" } */
extern void abort (void);
......
gcc/testsuite/gcc.target/sparc/cbcond-2.c
/* { dg-do compile } */
/* { dg-options "-O -mcbcond" } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O -mcbcond" } */
extern void foo (void);
extern void bar (void);
......
gcc/testsuite/gcc.target/sparc/movcc-1.c
/* { dg-do compile } */
/* { dg-options "-O2" } */
/* { dg-options "-O2 -mcpu=v9" } */
int foo1 (int a)
{
......
gcc/testsuite/gcc.target/sparc/movcc-2.c
/* { dg-do compile } */
/* { dg-options "-O2" } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O2" } */
long foo1 (long a)
{
......
gcc/testsuite/gcc.target/sparc/overflow-3.c
/* { dg-do compile } */
/* { dg-options "-O" } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O" } */
#include <stdbool.h>
#include <stdint.h>
......
gcc/testsuite/gcc.target/sparc/overflow-4.c
/* { dg-do compile } */
/* { dg-options "-O -mno-vis3" } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O -mno-vis3 -mno-vis4" } */
#include <stdbool.h>
#include <stdint.h>
......
gcc/testsuite/gcc.target/sparc/overflow-5.c
/* { dg-do compile } */
/* { dg-options "-O -mvis3" } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O -mvis3" } */
#include <stdbool.h>
#include <stdint.h>
......
gcc/testsuite/gcc.target/sparc/setcc-4.c
/* { dg-do compile } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O1 -mno-vis3" } */
/* { dg-options "-O1 -mno-vis3 -mno-vis4" } */
long neq (long a, long b)
{
......
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