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Commit 227e5798 by Christophe Lyon Committed by Christophe Lyon
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[ARM] Add -mbranch-cost option, and update a few tests 

2018-01-10  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* config/arm/arm.opt (-mbranch-cost): New option.
	* config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
	account.

	gcc/testsuite/
	* lib/target-supports.exp (check_effective_target_branch_cost):
	New function.
	* gcc.dg/builtin-bswap-7.c: Use branch_cost effective target.
	* gcc.dg/pr21643.c: Likewise.
	* gcc.dg/pr46309.c: Likewise.
	* gcc.dg/tree-ssa/phi-opt-11.c: Likewise.
	* gcc.dg/tree-ssa/phi-opt-2.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-32.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-33.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-34.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-35.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-36.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise.
	* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise.

From-SVN: r256434
parent d0ac0d52
Showing with 70 additions and 17 deletions
gcc/ChangeLog
2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
* config/arm/arm.opt (-mbranch-cost): New option.
* config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
account.
2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
PR target/83629
......
gcc/config/arm/arm.h
......@@ -1899,8 +1899,9 @@ enum arm_auto_incmodes
/* Try to generate sequences that don't involve branches, we can then use
conditional instructions. */
#define BRANCH_COST(speed_p, predictable_p) \
(current_tune->branch_cost (speed_p, predictable_p))
#define BRANCH_COST(speed_p, predictable_p) \
((arm_branch_cost != -1) ? arm_branch_cost : \
(current_tune->branch_cost (speed_p, predictable_p)))
/* False if short circuit operation is preferred. */
#define LOGICAL_OP_NON_SHORT_CIRCUIT \
......
gcc/config/arm/arm.opt
......@@ -298,3 +298,7 @@ When linking for big-endian targets, generate a BE8 format image.
mbe32
Target Report RejectNegative Negative(mbe8) InverseMask(BE8)
When linking for big-endian targets, generate a legacy BE32 format image.
mbranch-cost=
Target RejectNegative Joined UInteger Var(arm_branch_cost) Init(-1)
Cost to assume for a branch insn.
gcc/testsuite/ChangeLog
2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
* lib/target-supports.exp (check_effective_target_branch_cost):
New function.
* gcc.dg/builtin-bswap-7.c: Use branch_cost effective target.
* gcc.dg/pr21643.c: Likewise.
* gcc.dg/pr46309.c: Likewise.
* gcc.dg/tree-ssa/phi-opt-11.c: Likewise.
* gcc.dg/tree-ssa/phi-opt-2.c: Likewise.
* gcc.dg/tree-ssa/reassoc-32.c: Likewise.
* gcc.dg/tree-ssa/reassoc-33.c: Likewise.
* gcc.dg/tree-ssa/reassoc-34.c: Likewise.
* gcc.dg/tree-ssa/reassoc-35.c: Likewise.
* gcc.dg/tree-ssa/reassoc-36.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-13.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise.
* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise.
2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
PR target/83629
......
gcc/testsuite/gcc.dg/builtin-bswap-7.c
......@@ -5,7 +5,7 @@
/* The branch cost setting prevents the return value from being
calculated with arithmetic instead of doing a compare. */
/* { dg-additional-options "-mbranch-cost=0" { target s390x-*-* } } */
/* { dg-additional-options "-mbranch-cost=0" { target branch_cost } } */
#include <stdint.h>
......
gcc/testsuite/gcc.dg/pr21643.c
/* PR tree-optimization/21643 */
/* { dg-do compile } */
/* { dg-options "-O2 -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int
f1 (unsigned char c)
......
gcc/testsuite/gcc.dg/pr46309.c
......@@ -4,7 +4,7 @@
/* The transformation depends on BRANCH_COST being greater than 1
(see the notes in the PR), so try to force that. */
/* { dg-additional-options "-mtune=octeon2" { target mips*-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target avr*-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int
f1 (int a)
......
gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c
/* { dg-do compile } */
/* { dg-options "-O1 -fdump-tree-optimized" } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int f(int a, int b, int c)
{
......
gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c
/* { dg-do compile } */
/* { dg-options "-O1 -fdump-tree-optimized" } */
/* { dg-additional-options "-mbranch-cost=1" { target { i?86-*-* x86_64-*-* mips*-*-* s390*-*-* avr*-*-* } } } */
/* { dg-additional-options "-mbranch-cost=1" { target branch_cost } } */
_Bool f1(_Bool a, _Bool b)
{
......
gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int test (int a, int b, int c)
......
gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int test (int a, int b, int c)
{
......
gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int test (int a, int b, int c)
{
......
gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int test (unsigned int a, int b, int c)
{
......
gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
/* { dg-do run { target { ! "m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-* nios2*-*-*"} } } */
/* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int test (int a, int b, int c)
{
......
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c
/* { dg-do compile } */
/* { dg-options "-O1 -fdump-tree-optimized-details-blocks" } */
/* { dg-additional-options "-mbranch-cost=2" { target { i?86-*-* x86_64-*-* s390*-*-* avr*-*-* } } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
_Bool f1(_Bool a, _Bool b)
{
......
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
/* { dg-options "-O2 -g -fdump-tree-optimized" } */
/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int t (int a, int b)
{
......
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c
/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
/* { dg-options "-O2 -g -fdump-tree-optimized" } */
/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int t (int a, int b)
{
......
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c
/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
/* { dg-options "-O2 -g -fdump-tree-optimized" } */
/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int t (int a, int b)
{
......
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
/* { dg-options "-O2 -g -fdump-tree-optimized" } */
/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int t (int a, int b)
{
......
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
/* { dg-options "-O2 -g -fdump-tree-optimized" } */
/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int t (int a, int b, int c)
{
......
gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
/* { dg-do compile { target { ! { { logical_op_short_circuit && { ! avr-*-* } } || { m68k*-*-* mmix*-*-* bfin*-*-* v850*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-* } } } } } */
/* { dg-options "-O2 -g -fdump-tree-optimized" } */
/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* s390*-*-* i?86-*-* x86_64-*-* } } */
/* { dg-additional-options "-mbranch-cost=2" { target branch_cost } } */
int t (int a, int b, int c)
{
......
gcc/testsuite/lib/target-supports.exp
......@@ -8595,6 +8595,24 @@ proc check_effective_target_logical_op_short_circuit {} {
return 0
}
# Return 1 if the target supports -mbranch-cost=N option.
proc check_effective_target_branch_cost {} {
if { [ istarget arm*-*-*]
|| [istarget avr*-*-*]
|| [istarget epiphany*-*-*]
|| [istarget frv*-*-*]
|| [istarget i?86-*-linux*] || [istarget x86_64-*-linux*]
|| [istarget mips*-*-*]
|| [istarget s390*-*-*]
|| [istarget riscv*-*-*]
|| [istarget sh*-*-*]
|| [istarget spu*-*-*] } {
return 1
}
return 0
}
# Record that dg-final test TEST requires convential compilation.
proc force_conventional_output_for { test } {
......
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