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Commit 22219d9b by Matthew Fortune Committed by Matthew Fortune
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MIPS compact branch support 

gcc/
	* config/mips/mips-opts.h (mips_cb_setting): New enum.
	* config/mips/mips-protos.h: Add definitions for
	mips_output_jump and mips_output_equal_conditional_branch
	* gcc/config/mips/mips.c (MIPS_JR): Change to support the
	JIC instruction.
	(mips_emit_compare): Add support for the MIPS R6 conditional
	compact branches.
	(mips_process_sync_loop): Likewise.
	(mips_output_order_conditional_branch): Likewise.
	(mips16_build_call_stub): Change MIPS_CALL to
	mips_output_jump.
	(mips_print_operand_punctuation): Update 's' case to only
	apply to micromips r2.
	(mips_adjust_insn_length): Add support for forbidden slot
	hazards.
	(mips_avoid_hazard): Likewise.
	(mips_reorg_process_insns): Likewise.
	(mips_output_jump): New function.
	(mips_output_equal_conditional_branch): Likewise.
	(mips_output_conditional_branch): Use jrc/bc if compact
	branch support is enabled.  Ensure the forbidden slots
	between the two branch instructions is filled with a nop.
	(mips_option_override): Add support to process the compact
	branch option and set the correct defaults.  Prevent
	non-explict relocs being using for MIPS R6.
	(mips_trampoline_init): Add compact branch support.
	(mips_mult_zero_zero_cost): Allow zero initialisation of
	accumulators with TARGET_DSP.
	* gcc/config/mips/mips.h (TARGET_CB_NEVER): New define.
	(TARGET_CB_MAYBE): New define.
	(TARGET_CB_ALWAYS): New define.
	(ISA_HAS_DELAY_SLOTS): New define.
	(ISA_HAS_COMPACT_BRANCHES): New define.
	(ISA_HAS_JRC): New define.
	(MIPS_BRANCH_C): New define.
	(MIPS_CALL): Removed.
	(MICROMIPS_J): Removed.
	* config/mips/mips.md (compact_form): New attr.
	(hazard): Add support for forbidden slots.
	(define_delay): Add support for compact branches.
	(*branch_order<mode>): Likewise.
	(*branch_order<mode>_inverted): Likewise.
	(*branch_equality<mode>): Likewise.
	(*branch_equality<mode>_inverted): Likewise.
	(*jump_absolute): Likewise.
	(*jump_pic): Likewise.
	(indirect_jump): Use mips_output_jump to produce assembly output.
	(tablejump_<mode>"): Likewise.
	(*<optab>"): Likewise.
	(<optab>_internal): Likewise.
	(sibcall_internal): Likewise.
	(sibcall_value_internal): Likewise.
	(sibcall_value_multiple_internal): Likewise.
	(call_internal): Likewise.
	(call_split): Likewise.
	(call_internal_direct): Likewise.
	(call_direct_split): Likewise.
	(call_value_internal): Likewise.
	(call_value_split): Likewise.
	(call_value_internal_direct): Likewise.
	(call_value_direct_split): Likewise.
	(call_value_multiple_internal): Likewise.
	(call_value_multiple_split): Likewise.
	(mips_get_fcsr_mips16_<mode>): Likewise.
	(mips_set_fcsr_mips16_<mode>): Likewise.
	(tls_get_tp_mips16_<mode>): Likewise.
	* config/mips/mips.opt: Add -mcompact-branches option.
	* config/mips/predicates.md (order_operator): Ensure the
	conditional compact branches are only used if the ISA them.
	* doc/invoke.texi: Document -mcompact-branches option.

gcc/testsuite/
	* gcc.target/mips/mips.exp (mips-dg-options): Handle the
	dependencies between ISA level and compact-branches.
	* gcc.target/mips/branch-10.c: Update expected output to allow
	compact forms of b/bal.
	* gcc.target/mips/branch-11.c: Likewise.
	* gcc.target/mips/branch-12.c: Likewise.
	* gcc.target/mips/branch-13.c: Likewise.
	* gcc.target/mips/branch-3.c: Likewise.
	* gcc.target/mips/branch-4.c: Likewise.
	* gcc.target/mips/branch-5.c: Likewise.
	* gcc.target/mips/branch-6.c: Likewise.
	* gcc.target/mips/branch-7.c: Likewise.
	* gcc.target/mips/branch-8.c: Likewise.
	* gcc.target/mips/branch-9.c: Likewise.
	* gcc.target/mips/branch-cost-1.c: Likewise.
	* gcc.target/mips/call-1.c: Likewise.
	* gcc.target/mips/call-2.c: Likewise.
	* gcc.target/mips/call-3.c: Likewise.
	* gcc.target/mips/call-4.c: Likewise.
	* gcc.target/mips/call-5.c: Likewise.
	* gcc.target/mips/call-6.c: Likewise.
	* gcc.target/mips/lazy-binding-1.c: Likewise.
	* gcc.target/mips/near-far-1.c: Likewise.
	* gcc.target/mips/near-far-2.c: Likewise.
	* gcc.target/mips/near-far-3.c: Likewise.
	* gcc.target/mips/near-far-4.c: Likewise.
	* gcc.target/mips/umips-branch-3.c: Ensure the test is
	run with compact branches allowed.
	* gcc.target/mips/compact-branches-1.c: New file.
	* gcc.target/mips/compact-branches-2.c: Likewise.
	* gcc.target/mips/compact-branches-3.c: Likewise.
	* gcc.target/mips/compact-branches-4.c: Likewise.
	* gcc.target/mips/compact-branches-5.c: Likewise.
	* gcc.target/mips/compact-branches-6.c: Likewise.
	* gcc.target/mips/compact-branches-7.c: Likewise.

Co-Authored-By: Andrew Bennett <andrew.bennett@imgtec.com>

From-SVN: r227385
parent 2503fd9e
Showing with 346 additions and 85 deletions
gcc/ChangeLog
2015-09-01 Matthew Fortune <matthew.fortune@imgtec.com>
Andrew Bennett <andrew.bennett@imgtec.com>
* config/mips/mips-opts.h (mips_cb_setting): New enum.
* config/mips/mips-protos.h: Add definitions for
mips_output_jump and mips_output_equal_conditional_branch
* gcc/config/mips/mips.c (MIPS_JR): Change to support the
JIC instruction.
(mips_emit_compare): Add support for the MIPS R6 conditional
compact branches.
(mips_process_sync_loop): Likewise.
(mips_output_order_conditional_branch): Likewise.
(mips16_build_call_stub): Change MIPS_CALL to
mips_output_jump.
(mips_print_operand_punctuation): Update 's' case to only
apply to micromips r2.
(mips_adjust_insn_length): Add support for forbidden slot
hazards.
(mips_avoid_hazard): Likewise.
(mips_reorg_process_insns): Likewise.
(mips_output_jump): New function.
(mips_output_equal_conditional_branch): Likewise.
(mips_output_conditional_branch): Use jrc/bc if compact
branch support is enabled. Ensure the forbidden slots
between the two branch instructions is filled with a nop.
(mips_option_override): Add support to process the compact
branch option and set the correct defaults. Prevent
non-explict relocs being using for MIPS R6.
(mips_trampoline_init): Add compact branch support.
(mips_mult_zero_zero_cost): Allow zero initialisation of
accumulators with TARGET_DSP.
* gcc/config/mips/mips.h (TARGET_CB_NEVER): New define.
(TARGET_CB_MAYBE): New define.
(TARGET_CB_ALWAYS): New define.
(ISA_HAS_DELAY_SLOTS): New define.
(ISA_HAS_COMPACT_BRANCHES): New define.
(ISA_HAS_JRC): New define.
(MIPS_BRANCH_C): New define.
(MIPS_CALL): Removed.
(MICROMIPS_J): Removed.
* config/mips/mips.md (compact_form): New attr.
(hazard): Add support for forbidden slots.
(define_delay): Add support for compact branches.
(*branch_order<mode>): Likewise.
(*branch_order<mode>_inverted): Likewise.
(*branch_equality<mode>): Likewise.
(*branch_equality<mode>_inverted): Likewise.
(*jump_absolute): Likewise.
(*jump_pic): Likewise.
(indirect_jump): Use mips_output_jump to produce assembly output.
(tablejump_<mode>"): Likewise.
(*<optab>"): Likewise.
(<optab>_internal): Likewise.
(sibcall_internal): Likewise.
(sibcall_value_internal): Likewise.
(sibcall_value_multiple_internal): Likewise.
(call_internal): Likewise.
(call_split): Likewise.
(call_internal_direct): Likewise.
(call_direct_split): Likewise.
(call_value_internal): Likewise.
(call_value_split): Likewise.
(call_value_internal_direct): Likewise.
(call_value_direct_split): Likewise.
(call_value_multiple_internal): Likewise.
(call_value_multiple_split): Likewise.
(mips_get_fcsr_mips16_<mode>): Likewise.
(mips_set_fcsr_mips16_<mode>): Likewise.
(tls_get_tp_mips16_<mode>): Likewise.
* config/mips/mips.opt: Add -mcompact-branches option.
* config/mips/predicates.md (order_operator): Ensure the
conditional compact branches are only used if the ISA them.
* doc/invoke.texi: Document -mcompact-branches option.
2015-09-01 Vladimir Makarov <vmakarov@redhat.com> 2015-09-01 Vladimir Makarov <vmakarov@redhat.com>
PR target/61578 PR target/61578
......
gcc/config/mips/mips-opts.h
...@@ -47,4 +47,10 @@ enum mips_r10k_cache_barrier_setting { ...@@ -47,4 +47,10 @@ enum mips_r10k_cache_barrier_setting {
#define MIPS_ARCH_OPTION_FROM_ABI -1 #define MIPS_ARCH_OPTION_FROM_ABI -1
#define MIPS_ARCH_OPTION_NATIVE -2 #define MIPS_ARCH_OPTION_NATIVE -2
/* Enumerates the setting of the -mcompact-branches= option. */
enum mips_cb_setting {
MIPS_CB_NEVER,
MIPS_CB_OPTIMAL,
MIPS_CB_ALWAYS
};
#endif #endif
gcc/config/mips/mips-protos.h
...@@ -298,6 +298,9 @@ extern const char *mips_output_conditional_branch (rtx_insn *, rtx *, ...@@ -298,6 +298,9 @@ extern const char *mips_output_conditional_branch (rtx_insn *, rtx *,
const char *, const char *); const char *, const char *);
extern const char *mips_output_order_conditional_branch (rtx_insn *, rtx *, extern const char *mips_output_order_conditional_branch (rtx_insn *, rtx *,
bool); bool);
extern const char *mips_output_equal_conditional_branch (rtx_insn *, rtx *,
bool);
extern const char *mips_output_jump (rtx *, int, int, bool);
extern const char *mips_output_sync (void); extern const char *mips_output_sync (void);
extern const char *mips_output_sync_loop (rtx_insn *, rtx *); extern const char *mips_output_sync_loop (rtx_insn *, rtx *);
extern unsigned int mips_sync_loop_insns (rtx_insn *, rtx *); extern unsigned int mips_sync_loop_insns (rtx_insn *, rtx *);
......
gcc/config/mips/mips.h
...@@ -92,6 +92,33 @@ struct mips_cpu_info { ...@@ -92,6 +92,33 @@ struct mips_cpu_info {
/* True if we are generating position-independent VxWorks RTP code. */ /* True if we are generating position-independent VxWorks RTP code. */
#define TARGET_RTP_PIC (TARGET_VXWORKS_RTP && flag_pic) #define TARGET_RTP_PIC (TARGET_VXWORKS_RTP && flag_pic)
/* Compact branches must not be used if the user either selects the
'never' policy or the 'optimal' policy on a core that lacks
compact branch instructions. */
#define TARGET_CB_NEVER (mips_cb == MIPS_CB_NEVER \
|| (mips_cb == MIPS_CB_OPTIMAL \
&& !ISA_HAS_COMPACT_BRANCHES))
/* Compact branches may be used if the user either selects the
'always' policy or the 'optimal' policy on a core that supports
compact branch instructions. */
#define TARGET_CB_MAYBE (TARGET_CB_ALWAYS \
|| (mips_cb == MIPS_CB_OPTIMAL \
&& ISA_HAS_COMPACT_BRANCHES))
/* Compact branches must always be generated if the user selects
the 'always' policy or the 'optimal' policy om a core that
lacks delay slot branch instructions. */
#define TARGET_CB_ALWAYS (mips_cb == MIPS_CB_ALWAYS \
|| (mips_cb == MIPS_CB_OPTIMAL \
&& !ISA_HAS_DELAY_SLOTS))
/* Special handling for JRC that exists in microMIPSR3 as well as R6
ISAs with full compact branch support. */
#define ISA_HAS_JRC ((ISA_HAS_COMPACT_BRANCHES \
|| TARGET_MICROMIPS) \
&& mips_cb != MIPS_CB_NEVER)
/* True if the output file is marked as ".abicalls; .option pic0" /* True if the output file is marked as ".abicalls; .option pic0"
(-call_nonpic). */ (-call_nonpic). */
#define TARGET_ABICALLS_PIC0 \ #define TARGET_ABICALLS_PIC0 \
...@@ -872,6 +899,10 @@ struct mips_cpu_info { ...@@ -872,6 +899,10 @@ struct mips_cpu_info {
#define ISA_HAS_JR (mips_isa_rev <= 5) #define ISA_HAS_JR (mips_isa_rev <= 5)
#define ISA_HAS_DELAY_SLOTS 1
#define ISA_HAS_COMPACT_BRANCHES (mips_isa_rev >= 6)
/* ISA has branch likely instructions (e.g. mips2). */ /* ISA has branch likely instructions (e.g. mips2). */
/* Disable branchlikely for tx39 until compare rewrite. They haven't /* Disable branchlikely for tx39 until compare rewrite. They haven't
been generated up to this point. */ been generated up to this point. */
...@@ -2645,6 +2676,9 @@ typedef struct mips_args { ...@@ -2645,6 +2676,9 @@ typedef struct mips_args {
#define MIPS_BRANCH(OPCODE, OPERANDS) \ #define MIPS_BRANCH(OPCODE, OPERANDS) \
"%*" OPCODE "%?\t" OPERANDS "%/" "%*" OPCODE "%?\t" OPERANDS "%/"
#define MIPS_BRANCH_C(OPCODE, OPERANDS) \
"%*" OPCODE "%:\t" OPERANDS
/* Return an asm string that forces INSN to be treated as an absolute /* Return an asm string that forces INSN to be treated as an absolute
J or JAL instruction instead of an assembler macro. */ J or JAL instruction instead of an assembler macro. */
#define MIPS_ABSOLUTE_JUMP(INSN) \ #define MIPS_ABSOLUTE_JUMP(INSN) \
...@@ -2652,45 +2686,6 @@ typedef struct mips_args { ...@@ -2652,45 +2686,6 @@ typedef struct mips_args {
? ".option\tpic0\n\t" INSN "\n\t.option\tpic2" \ ? ".option\tpic0\n\t" INSN "\n\t.option\tpic2" \
: INSN) : INSN)
/* Return the asm template for a call. INSN is the instruction's mnemonic
("j" or "jal"), OPERANDS are its operands, TARGET_OPNO is the operand
number of the target. SIZE_OPNO is the operand number of the argument size
operand that can optionally hold the call attributes. If SIZE_OPNO is not
-1 and the call is indirect, use the function symbol from the call
attributes to attach a R_MIPS_JALR relocation to the call.
When generating GOT code without explicit relocation operators,
all calls should use assembly macros. Otherwise, all indirect
calls should use "jr" or "jalr"; we will arrange to restore $gp
afterwards if necessary. Finally, we can only generate direct
calls for -mabicalls by temporarily switching to non-PIC mode.
For microMIPS jal(r), we try to generate jal(r)s when a 16-bit
instruction is in the delay slot of jal(r). */
#define MIPS_CALL(INSN, OPERANDS, TARGET_OPNO, SIZE_OPNO) \
(TARGET_USE_GOT && !TARGET_EXPLICIT_RELOCS \
? "%*" INSN "\t%" #TARGET_OPNO "%/" \
: REG_P (OPERANDS[TARGET_OPNO]) \
? (mips_get_pic_call_symbol (OPERANDS, SIZE_OPNO) \
? ("%*.reloc\t1f,R_MIPS_JALR,%" #SIZE_OPNO "\n" \
"1:\t" INSN "r\t%" #TARGET_OPNO "%/") \
: TARGET_MICROMIPS && !TARGET_INTERLINK_COMPRESSED \
? "%*" INSN "r%!\t%" #TARGET_OPNO "%/" \
: "%*" INSN "r\t%" #TARGET_OPNO "%/") \
: TARGET_MICROMIPS && !TARGET_INTERLINK_COMPRESSED \
? MIPS_ABSOLUTE_JUMP ("%*" INSN "%!\t%" #TARGET_OPNO "%/") \
: MIPS_ABSOLUTE_JUMP ("%*" INSN "\t%" #TARGET_OPNO "%/")) \
/* Similar to MIPS_CALL, but this is for MICROMIPS "j" to generate
"jrc" when nop is in the delay slot of "jr". */
#define MICROMIPS_J(INSN, OPERANDS, OPNO) \
(TARGET_USE_GOT && !TARGET_EXPLICIT_RELOCS \
? "%*j\t%" #OPNO "%/" \
: REG_P (OPERANDS[OPNO]) \
? "%*jr%:\t%" #OPNO \
: MIPS_ABSOLUTE_JUMP ("%*" INSN "\t%" #OPNO "%/"))
/* Control the assembler format that we output. */ /* Control the assembler format that we output. */
......
gcc/config/mips/mips.opt
...@@ -418,3 +418,20 @@ Driver ...@@ -418,3 +418,20 @@ Driver
mload-store-pairs mload-store-pairs
Target Report Var(TARGET_LOAD_STORE_PAIRS) Init(1) Target Report Var(TARGET_LOAD_STORE_PAIRS) Init(1)
Enable load/store bonding. Enable load/store bonding.
mcompact-branches=
Target RejectNegative JoinedOrMissing Var(mips_cb) Report Enum(mips_cb_setting) Init(MIPS_CB_OPTIMAL)
Specify the compact branch usage policy
Enum
Name(mips_cb_setting) Type(enum mips_cb_setting)
Policies available for use with -mcompact-branches=:
EnumValue
Enum(mips_cb_setting) String(never) Value(MIPS_CB_NEVER)
EnumValue
Enum(mips_cb_setting) String(optimal) Value(MIPS_CB_OPTIMAL)
EnumValue
Enum(mips_cb_setting) String(always) Value(MIPS_CB_ALWAYS)
gcc/config/mips/predicates.md
...@@ -475,7 +475,18 @@ ...@@ -475,7 +475,18 @@
(match_code "eq,ne,lt,ltu,ge,geu")) (match_code "eq,ne,lt,ltu,ge,geu"))
(define_predicate "order_operator" (define_predicate "order_operator"
(match_code "lt,ltu,le,leu,ge,geu,gt,gtu")) (match_code "lt,ltu,le,leu,ge,geu,gt,gtu")
{
if (XEXP (op, 1) == const0_rtx)
return true;
if (TARGET_CB_MAYBE
&& (GET_CODE (op) == LT || GET_CODE (op) == LTU
|| GET_CODE (op) == GE || GET_CODE (op) == GEU))
return true;
return false;
})
;; For NE, cstore uses sltu instructions in which the first operand is $0. ;; For NE, cstore uses sltu instructions in which the first operand is $0.
;; This isn't possible in mips16 code. ;; This isn't possible in mips16 code.
......
gcc/doc/invoke.texi
...@@ -782,6 +782,7 @@ Objective-C and Objective-C++ Dialects}. ...@@ -782,6 +782,7 @@ Objective-C and Objective-C++ Dialects}.
-mgp32 -mgp64 -mfp32 -mfpxx -mfp64 -mhard-float -msoft-float @gol -mgp32 -mgp64 -mfp32 -mfpxx -mfp64 -mhard-float -msoft-float @gol
-mno-float -msingle-float -mdouble-float @gol -mno-float -msingle-float -mdouble-float @gol
-modd-spreg -mno-odd-spreg @gol -modd-spreg -mno-odd-spreg @gol
-mcompact-branches=@var{policy} @gol
-mabs=@var{mode} -mnan=@var{encoding} @gol -mabs=@var{mode} -mnan=@var{encoding} @gol
-mdsp -mno-dsp -mdspr2 -mno-dspr2 @gol -mdsp -mno-dsp -mdspr2 -mno-dspr2 @gol
-mmcu -mmno-mcu @gol -mmcu -mmno-mcu @gol
...@@ -17303,6 +17304,30 @@ for the o32 ABI. This is the default for processors that are known to ...@@ -17303,6 +17304,30 @@ for the o32 ABI. This is the default for processors that are known to
support these registers. When using the o32 FPXX ABI, @option{-mno-odd-spreg} support these registers. When using the o32 FPXX ABI, @option{-mno-odd-spreg}
is set by default. is set by default.
@item -mcompact-branches=never
@itemx -mcompact-branches=optimal
@itemx -mcompact-branches=always
@opindex mcompact-branches=never
@opindex mcompact-branches=optimal
@opindex mcompact-branches=always
These options control which form of branches will be generated. The
default is @option{-mcompact-branches=optimal}.
The @option{-mcompact-branches=never} option ensures that compact branch
instructions will never be generated.
The @option{-mcompact-branches=always} option ensures that a compact
branch instruction will be generated if available. If a compact branch
instruction is not available, a delay slot form of the branch will be
used instead.
This option is supported from MIPS Release 6 onwards.
The @option{-mcompact-branches=optimal} option will cause a delay slot
branch to be used if one is available in the current ISA and the delay
slot is successfully filled. If the delay slot is not filled, a compact
branch will be chosen if one is available.
@item -mabs=2008 @item -mabs=2008
@itemx -mabs=legacy @itemx -mabs=legacy
@opindex mabs=2008 @opindex mabs=2008
......
gcc/testsuite/ChangeLog
2015-09-01 Matthew Fortune <matthew.fortune@imgtec.com>
Andrew Bennett <andrew.bennett@imgtec.com>
* gcc.target/mips/mips.exp (mips-dg-options): Handle the
dependencies between ISA level and compact-branches.
* gcc.target/mips/branch-10.c: Update expected output to allow
compact forms of b/bal.
* gcc.target/mips/branch-11.c: Likewise.
* gcc.target/mips/branch-12.c: Likewise.
* gcc.target/mips/branch-13.c: Likewise.
* gcc.target/mips/branch-3.c: Likewise.
* gcc.target/mips/branch-4.c: Likewise.
* gcc.target/mips/branch-5.c: Likewise.
* gcc.target/mips/branch-6.c: Likewise.
* gcc.target/mips/branch-7.c: Likewise.
* gcc.target/mips/branch-8.c: Likewise.
* gcc.target/mips/branch-9.c: Likewise.
* gcc.target/mips/branch-cost-1.c: Likewise.
* gcc.target/mips/call-1.c: Likewise.
* gcc.target/mips/call-2.c: Likewise.
* gcc.target/mips/call-3.c: Likewise.
* gcc.target/mips/call-4.c: Likewise.
* gcc.target/mips/call-5.c: Likewise.
* gcc.target/mips/call-6.c: Likewise.
* gcc.target/mips/lazy-binding-1.c: Likewise.
* gcc.target/mips/near-far-1.c: Likewise.
* gcc.target/mips/near-far-2.c: Likewise.
* gcc.target/mips/near-far-3.c: Likewise.
* gcc.target/mips/near-far-4.c: Likewise.
* gcc.target/mips/umips-branch-3.c: Ensure the test is
run with compact branches allowed.
* gcc.target/mips/compact-branches-1.c: New file.
* gcc.target/mips/compact-branches-2.c: Likewise.
* gcc.target/mips/compact-branches-3.c: Likewise.
* gcc.target/mips/compact-branches-4.c: Likewise.
* gcc.target/mips/compact-branches-5.c: Likewise.
* gcc.target/mips/compact-branches-6.c: Likewise.
* gcc.target/mips/compact-branches-7.c: Likewise.
2015-09-01 Steven G. Kargl <kargl@gcc.gnu.org> 2015-09-01 Steven G. Kargl <kargl@gcc.gnu.org>
* gfortran.dg/read_dir.f90: XFAIL this testcase on FreeBSD. * gfortran.dg/read_dir.f90: XFAIL this testcase on FreeBSD.
......
gcc/testsuite/gcc.target/mips/branch-10.c
/* { dg-options "-mshared -mabi=n32" } */ /* { dg-options "-mshared -mabi=n32" } */
/* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */ /* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
#include "branch-helper.h" #include "branch-helper.h"
......
gcc/testsuite/gcc.target/mips/branch-11.c
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
/* { dg-final { scan-assembler "\taddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */ /* { dg-final { scan-assembler "\taddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
/* { dg-final { scan-assembler "\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$28\\)\n" } } */ /* { dg-final { scan-assembler "\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$28\\)\n" } } */
/* { dg-final { scan-assembler "\taddiu\t\\\$1,\\\$1,%got_ofst\\(\[^)\]*\\)\n" } } */ /* { dg-final { scan-assembler "\taddiu\t\\\$1,\\\$1,%got_ofst\\(\[^)\]*\\)\n" } } */
/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler "\tjrc?\t\\\$1\n" } } */
#include "branch-helper.h" #include "branch-helper.h"
......
gcc/testsuite/gcc.target/mips/branch-12.c
/* { dg-options "-mshared -mabi=64" } */ /* { dg-options "-mshared -mabi=64" } */
/* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */ /* { dg-final { scan-assembler-not "(\\\$28|%gp_rel|%got)" } } */
/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
#include "branch-helper.h" #include "branch-helper.h"
......
gcc/testsuite/gcc.target/mips/branch-13.c
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
/* { dg-final { scan-assembler "\tdaddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */ /* { dg-final { scan-assembler "\tdaddiu\t\\\$28,\\\$28,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
/* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$28\\)\n" } } */ /* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$28\\)\n" } } */
/* { dg-final { scan-assembler "\tdaddiu\t\\\$1,\\\$1,%got_ofst\\(\[^)\]*\\)\n" } } */ /* { dg-final { scan-assembler "\tdaddiu\t\\\$1,\\\$1,%got_ofst\\(\[^)\]*\\)\n" } } */
/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler "\tjrc?\t\\\$1\n" } } */
#include "branch-helper.h" #include "branch-helper.h"
......
gcc/testsuite/gcc.target/mips/branch-3.c
/* { dg-options "-mshared -mabi=32" } */ /* { dg-options "-mshared -mabi=32" } */
/* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */ /* { dg-final { scan-assembler "\t\\.cpload\t\\\$25\n" } } */
/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler "\tjrc?\t\\\$1\n" } } */
/* { dg-final { scan-assembler-not "\\.cprestore" } } */ /* { dg-final { scan-assembler-not "\\.cprestore" } } */
#include "branch-helper.h" #include "branch-helper.h"
......
gcc/testsuite/gcc.target/mips/branch-4.c
/* { dg-options "-mshared -mabi=n32" } */ /* { dg-options "-mshared -mabi=n32" } */
/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */ /* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */
/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
#include "branch-helper.h" #include "branch-helper.h"
......
gcc/testsuite/gcc.target/mips/branch-5.c
/* { dg-options "-mshared -mabi=n32" } */ /* { dg-options "-mshared -mabi=n32" } */
/* { dg-final { scan-assembler "\taddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */ /* { dg-final { scan-assembler "\taddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
/* { dg-final { scan-assembler "\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */ /* { dg-final { scan-assembler "\tlw\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler "\tjrc?\t\\\$1\n" } } */
/* { dg-final { scan-assembler-not "\\\$28" } } */ /* { dg-final { scan-assembler-not "\\\$28" } } */
#include "branch-helper.h" #include "branch-helper.h"
......
gcc/testsuite/gcc.target/mips/branch-6.c
/* { dg-options "-mshared -mabi=64" } */ /* { dg-options "-mshared -mabi=64" } */
/* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */ /* { dg-final { scan-assembler-not "(\\\$25|\\\$28|%gp_rel|%got)" } } */
/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
#include "branch-helper.h" #include "branch-helper.h"
......
gcc/testsuite/gcc.target/mips/branch-7.c
/* { dg-options "-mshared -mabi=64" } */ /* { dg-options "-mshared -mabi=64" } */
/* { dg-final { scan-assembler "\tdaddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */ /* { dg-final { scan-assembler "\tdaddiu\t\\\$3,\\\$3,%lo\\(%neg\\(%gp_rel\\(foo\\)\\)\\)\n" } } */
/* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */ /* { dg-final { scan-assembler "\tld\t\\\$1,%got_page\\(\[^)\]*\\)\\(\\\$3\\)\\n" } } */
/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler "\tjrc?\t\\\$1\n" } } */
/* { dg-final { scan-assembler-not "\\\$28" } } */ /* { dg-final { scan-assembler-not "\\\$28" } } */
#include "branch-helper.h" #include "branch-helper.h"
......
gcc/testsuite/gcc.target/mips/branch-8.c
/* { dg-options "-mshared -mabi=32" } */ /* { dg-options "-mshared -mabi=32" } */
/* { dg-final { scan-assembler-not "(\\\$28|cpload|cprestore)" } } */ /* { dg-final { scan-assembler-not "(\\\$28|cpload|cprestore)" } } */
/* { dg-final { scan-assembler-not "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler-not "\tjrc?\t\\\$1\n" } } */
#include "branch-helper.h" #include "branch-helper.h"
......
gcc/testsuite/gcc.target/mips/branch-9.c
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
/* { dg-final { scan-assembler "\tlw\t\\\$1,16\\(\\\$(fp|sp)\\)\n" } } */ /* { dg-final { scan-assembler "\tlw\t\\\$1,16\\(\\\$(fp|sp)\\)\n" } } */
/* { dg-final { scan-assembler "\tlw\t\\\$1,%got\\(\[^)\]*\\)\\(\\\$1\\)\n" } } */ /* { dg-final { scan-assembler "\tlw\t\\\$1,%got\\(\[^)\]*\\)\\(\\\$1\\)\n" } } */
/* { dg-final { scan-assembler "\taddiu\t\\\$1,\\\$1,%lo\\(\[^)\]*\\)\n" } } */ /* { dg-final { scan-assembler "\taddiu\t\\\$1,\\\$1,%lo\\(\[^)\]*\\)\n" } } */
/* { dg-final { scan-assembler "\tjr\t\\\$1\n" } } */ /* { dg-final { scan-assembler "\tjrc?\t\\\$1\n" } } */
/* { dg-final { scan-assembler-not "\\\$28" } } */ /* { dg-final { scan-assembler-not "\\\$28" } } */
#include "branch-helper.h" #include "branch-helper.h"
......
gcc/testsuite/gcc.target/mips/branch-cost-1.c
...@@ -6,4 +6,4 @@ foo (int x, int y, int z, int k) ...@@ -6,4 +6,4 @@ foo (int x, int y, int z, int k)
return x == k ? x + y : z - x; return x == k ? x + y : z - x;
} }
/* { dg-final { scan-assembler-not "\t(movz|movn)\t" } } */ /* { dg-final { scan-assembler-not "\t(movz|movn)\t" } } */
/* { dg-final { scan-assembler "\t(bne|beq)\t" } } */ /* { dg-final { scan-assembler "\t(bnec?|beqc?)\t" } } */
gcc/testsuite/gcc.target/mips/call-1.c
/* { dg-options "-mrelax-pic-calls -mshared -foptimize-sibling-calls -mabi=32" } */ /* { dg-options "-mrelax-pic-calls -mshared -foptimize-sibling-calls -mabi=32" } */
/* { dg-skip-if "requires -foptimize-sibling-calls" { *-*-* } { "-O0" } { "" } } */ /* { dg-skip-if "requires -foptimize-sibling-calls" { *-*-* } { "-O0" } { "" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal\n1:\tjalrs?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal\n1:\tjalrc?s?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal2\n1:\tjalrs?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal2\n1:\tjalrc?s?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,staticfunc\n1:\tjalrs?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,staticfunc\n1:\tjalrc?s?\t" } } */
/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail\n1:)?\tjrc?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail\n1:\tjrc?\t" } } */
/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail2\n1:)?\tjrc?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail2\n1:\tjrc?\t" } } */
/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail3\n1:)?\tjrc?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail3\n1:\tjrc?\t" } } */
/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail4\n1:)?\tjrc?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail4\n1:\tjrc?\t" } } */
__attribute__ ((noinline)) static void staticfunc () { asm (""); } __attribute__ ((noinline)) static void staticfunc () { asm (""); }
int normal (); int normal ();
......
gcc/testsuite/gcc.target/mips/call-2.c
/* See through some simple data-flow. */ /* See through some simple data-flow. */
/* { dg-options "-mrelax-pic-calls" } */ /* { dg-options "-mrelax-pic-calls" } */
/* { dg-final { scan-assembler-times "\\.reloc\t1f,R_MIPS_JALR,g\n1:\tjalrs?\t" 2 } } */ /* { dg-final { scan-assembler-times "\\.reloc\t1f,R_MIPS_JALR,g\n1:\tjalrc?s?\t" 2 } } */
extern void g (void); extern void g (void);
......
gcc/testsuite/gcc.target/mips/call-3.c
/* { dg-options "-mrelax-pic-calls -mno-shared" } */ /* { dg-options "-mrelax-pic-calls -mno-shared" } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,g\n1:\tjalrs?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,g\n1:\tjalrc?s?\t" } } */
/* { dg-require-visibility "" } */ /* { dg-require-visibility "" } */
__attribute__ ((visibility ("hidden"))) void g (); __attribute__ ((visibility ("hidden"))) void g ();
......
gcc/testsuite/gcc.target/mips/call-4.c
/* See through some simple data-flow. */ /* See through some simple data-flow. */
/* { dg-options "-mrelax-pic-calls" } */ /* { dg-options "-mrelax-pic-calls" } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,g\n1:\tjalr\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,g\n1:\tjalrc?\t" } } */
extern void g (void); extern void g (void);
......
gcc/testsuite/gcc.target/mips/call-5.c
...@@ -2,13 +2,13 @@ ...@@ -2,13 +2,13 @@
in this case (PR target/57260). */ in this case (PR target/57260). */
/* { dg-options "-mrelax-pic-calls -mshared -foptimize-sibling-calls -mabi=n32" } */ /* { dg-options "-mrelax-pic-calls -mshared -foptimize-sibling-calls -mabi=n32" } */
/* { dg-skip-if "requires -foptimize-sibling-calls" { *-*-* } { "-O0" } { "" } } */ /* { dg-skip-if "requires -foptimize-sibling-calls" { *-*-* } { "-O0" } { "" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal\n1:\tjalr\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal\n1:\tjalrc?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal2\n1:\tjalr\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal2\n1:\tjalrc?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,staticfunc\n1:\tjalr\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,staticfunc\n1:\tjalrc?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail\n1:\tjalr\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail\n1:\tjalrc?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail2\n1:\tjalr\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail2\n1:\tjalrc?\t" } } */
/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail3\n1:)?\tjrc?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail3\n1:\tjrc?\t" } } */
/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail4\n1:)?\tjrc?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail4\n1:\tjrc?\t" } } */
__attribute__ ((noinline)) static void staticfunc () { asm (""); } __attribute__ ((noinline)) static void staticfunc () { asm (""); }
int normal (); int normal ();
......
gcc/testsuite/gcc.target/mips/call-6.c
/* Like call-5.c, but for n64. */ /* Like call-5.c, but for n64. */
/* { dg-options "-mrelax-pic-calls -mshared -foptimize-sibling-calls -mabi=64" } */ /* { dg-options "-mrelax-pic-calls -mshared -foptimize-sibling-calls -mabi=64" } */
/* { dg-skip-if "requires -foptimize-sibling-calls" { *-*-* } { "-O0" } { "" } } */ /* { dg-skip-if "requires -foptimize-sibling-calls" { *-*-* } { "-O0" } { "" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal\n1:\tjalr\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal\n1:\tjalrc?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal2\n1:\tjalr\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,normal2\n1:\tjalrc?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,staticfunc\n1:\tjalr\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,staticfunc\n1:\tjalrc?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail\n1:\tjalr\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail\n1:\tjalrc?\t" } } */
/* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail2\n1:\tjalr\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail2\n1:\tjalrc?\t" } } */
/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail3\n1:)?\tjrc?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail3\n1:\tjrc?\t" } } */
/* { dg-final { scan-assembler "(\\.reloc\t1f,R_MIPS_JALR,tail4\n1:)?\tjrc?\t" } } */ /* { dg-final { scan-assembler "\\.reloc\t1f,R_MIPS_JALR,tail4\n1:\tjrc?\t" } } */
__attribute__ ((noinline)) static void staticfunc () { asm (""); } __attribute__ ((noinline)) static void staticfunc () { asm (""); }
int normal (); int normal ();
......
gcc/testsuite/gcc.target/mips/compact-branches-1.c 0 → 100644
/* { dg-options "-mcompact-branches=always -mno-micromips" } */
int glob;
void
foo (int a, int b)
{
if (a < b)
glob = 1;
}
/* { dg-final { scan-assembler "\tbgec\t\\\$\[0-9\]*,\\\$\[0-9\]*" } } */
/* { dg-final { scan-assembler "\tjrc\t\\\$31" } } */
gcc/testsuite/gcc.target/mips/compact-branches-2.c 0 → 100644
/* { dg-options "-mcompact-branches=never" } */
int glob;
void
foo (int a, int b)
{
if (a < b)
glob = 1;
}
/* { dg-final { scan-assembler-not "\tb\[^ \t\]*c" } } */
/* { dg-final { scan-assembler-not "\tj\[^ \t\]*c" } } */
gcc/testsuite/gcc.target/mips/compact-branches-3.c 0 → 100644
/* { dg-options "-mcompact-branches=never isa_rev>=6" } */
int glob;
void
foo (int a, int b, volatile int * bar)
{
if (a < b)
glob = *bar;
}
/* { dg-final { scan-assembler "\tnop" } } */
/* { dg-final { scan-assembler-not "\tb\[^ \t\]*c" } } */
/* { dg-final { scan-assembler-not "\tj\[^ \t\]*c" } } */
gcc/testsuite/gcc.target/mips/compact-branches-4.c 0 → 100644
/* { dg-options "-mcompact-branches=optimal isa_rev>=6" } */
int glob;
void
foo (int a, int b, volatile int * bar)
{
if (a < b)
glob = *bar;
}
/* { dg-final { scan-assembler "\tb\[^ \t\]*c" } } */
gcc/testsuite/gcc.target/mips/compact-branches-5.c 0 → 100644
/* { dg-options "-mno-abicalls -mcompact-branches=never isa_rev>=6" } */
void bar (int);
void
foo ()
{
bar (1);
}
/* { dg-final { scan-assembler "\t(j|jal)\t" } } */
gcc/testsuite/gcc.target/mips/compact-branches-6.c 0 → 100644
/* { dg-options "-mno-abicalls -mcompact-branches=optimal isa_rev>=6" } */
void bar (int);
void
foo ()
{
bar (1);
}
/* { dg-final { scan-assembler "\t(bc|balc)\t" } } */
gcc/testsuite/gcc.target/mips/compact-branches-7.c 0 → 100644
/* { dg-options "-mhard-float -mcompact-branches=always isa_rev>=6 -mno-micromips" } */
int bar;
void
foo (float a, volatile int * b)
{
if (a < 0.1)
bar = *b;
}
/* { dg-final { scan-assembler "\t(bc1eqz|bc1nez)\t" } } */
/* { dg-final { scan-assembler "\tnop" } } */
gcc/testsuite/gcc.target/mips/lazy-binding-1.c
...@@ -19,6 +19,6 @@ foo (int n) ...@@ -19,6 +19,6 @@ foo (int n)
/* There should be exactly five uses of $25: one to set up $gp, two to /* There should be exactly five uses of $25: one to set up $gp, two to
load the address of bar (), and two to call it. */ load the address of bar (), and two to call it. */
/* { dg-final { scan-assembler-times "\tl.\t\\\$25,%call16\\\(bar\\\)" 2 } } */ /* { dg-final { scan-assembler-times "\tl.\t\\\$25,%call16\\\(bar\\\)" 2 } } */
/* { dg-final { scan-assembler-times "\tjalrs?\t\\\$25" 2 } } */ /* { dg-final { scan-assembler-times "\tjalrc?s?\t\\\$25" 2 } } */
/* { dg-final { scan-assembler "(\\\$28,|\t.cpload\t)\\\$25" } } */ /* { dg-final { scan-assembler "(\\\$28,|\t.cpload\t)\\\$25" } } */
/* { dg-final { scan-assembler-times "\\\$25" 5 } } */ /* { dg-final { scan-assembler-times "\\\$25" 5 } } */
gcc/testsuite/gcc.target/mips/mips.exp
...@@ -243,6 +243,7 @@ set mips_option_groups { ...@@ -243,6 +243,7 @@ set mips_option_groups {
mips16 "-mips16|-mno-mips16|-mflip-mips16" mips16 "-mips16|-mno-mips16|-mflip-mips16"
mips3d "-mips3d|-mno-mips3d" mips3d "-mips3d|-mno-mips3d"
pic "-f(no-|)(pic|PIC)" pic "-f(no-|)(pic|PIC)"
cb "-mcompact-branches=.*"
profiling "-pg" profiling "-pg"
small-data "-G[0-9]+" small-data "-G[0-9]+"
warnings "-w" warnings "-w"
...@@ -1068,8 +1069,10 @@ proc mips-dg-options { args } { ...@@ -1068,8 +1069,10 @@ proc mips-dg-options { args } {
# We need a revision 6 or better ISA for: # We need a revision 6 or better ISA for:
# #
# - When the LSA instruction is required # - When the LSA instruction is required
# - When only using compact branches
if { $isa_rev < 6 if { $isa_rev < 6
&& ([mips_have_test_option_p options "HAS_LSA"]) } { && ([mips_have_test_option_p options "HAS_LSA"]
|| [mips_have_test_option_p options "-mcompact-branches=always"]) } {
if { $gp_size == 32 } { if { $gp_size == 32 } {
mips_make_test_option options "-mips32r6" mips_make_test_option options "-mips32r6"
} else { } else {
...@@ -1164,6 +1167,9 @@ proc mips-dg-options { args } { ...@@ -1164,6 +1167,9 @@ proc mips-dg-options { args } {
mips_make_test_option options "-mips64r5" mips_make_test_option options "-mips64r5"
} }
mips_make_test_option options "-mnan=2008" mips_make_test_option options "-mnan=2008"
if { [mips_have_option_p options "-mcompact-branches=always"] } {
mips_make_test_option options "-mcompact-branches=optimal"
}
# Check whether we need to switch from a 32-bit processor to the # Check whether we need to switch from a 32-bit processor to the
# "nearest" 64-bit processor. # "nearest" 64-bit processor.
} elseif { $gp_size == 64 && [mips_32bit_arch_p $arch] } { } elseif { $gp_size == 64 && [mips_32bit_arch_p $arch] } {
...@@ -1308,6 +1314,11 @@ proc mips-dg-options { args } { ...@@ -1308,6 +1314,11 @@ proc mips-dg-options { args } {
mips_make_test_option options "-mno-micromips" mips_make_test_option options "-mno-micromips"
mips_make_test_option options "-mnan=legacy" mips_make_test_option options "-mnan=legacy"
} }
if { $isa_rev < 6 } {
if { [mips_have_option_p options "-mcompact-branches=always"] } {
mips_make_test_option options "-mcompact-branches=optimal"
}
}
if { $isa_rev > 5 } { if { $isa_rev > 5 } {
mips_make_test_option options "-mno-dsp" mips_make_test_option options "-mno-dsp"
mips_make_test_option options "-mno-mips16" mips_make_test_option options "-mno-mips16"
......
gcc/testsuite/gcc.target/mips/near-far-1.c
...@@ -16,5 +16,5 @@ int test () ...@@ -16,5 +16,5 @@ int test ()
/* { dg-final { scan-assembler-not "\tjal\tlong_call_func\n" } } */ /* { dg-final { scan-assembler-not "\tjal\tlong_call_func\n" } } */
/* { dg-final { scan-assembler-not "\tjal\tfar_func\n" } } */ /* { dg-final { scan-assembler-not "\tjal\tfar_func\n" } } */
/* { dg-final { scan-assembler "\tjal(|s)\tnear_func\n" } } */ /* { dg-final { scan-assembler "\t(jal(|s)|balc)\tnear_func\n" } } */
/* { dg-final { scan-assembler-not "\tjal\tnormal_func\n" } } */ /* { dg-final { scan-assembler-not "\tjal\tnormal_func\n" } } */
gcc/testsuite/gcc.target/mips/near-far-2.c
...@@ -16,5 +16,5 @@ int test () ...@@ -16,5 +16,5 @@ int test ()
/* { dg-final { scan-assembler-not "\tjal(|s)\tlong_call_func\n" } } */ /* { dg-final { scan-assembler-not "\tjal(|s)\tlong_call_func\n" } } */
/* { dg-final { scan-assembler-not "\tjal(|s)\tfar_func\n" } } */ /* { dg-final { scan-assembler-not "\tjal(|s)\tfar_func\n" } } */
/* { dg-final { scan-assembler "\tjal(|s)\tnear_func\n" } } */ /* { dg-final { scan-assembler "\t(jal(|s)|balc)\tnear_func\n" } } */
/* { dg-final { scan-assembler "\tjal(|s)\tnormal_func\n" } } */ /* { dg-final { scan-assembler "\t(jal(|s)|balc)\tnormal_func\n" } } */
gcc/testsuite/gcc.target/mips/near-far-3.c
...@@ -13,5 +13,5 @@ NOMIPS16 int test4 () { return normal_func (); } ...@@ -13,5 +13,5 @@ NOMIPS16 int test4 () { return normal_func (); }
/* { dg-final { scan-assembler-not "\tj\tlong_call_func\n" } } */ /* { dg-final { scan-assembler-not "\tj\tlong_call_func\n" } } */
/* { dg-final { scan-assembler-not "\tj\tfar_func\n" } } */ /* { dg-final { scan-assembler-not "\tj\tfar_func\n" } } */
/* { dg-final { scan-assembler "\tj(|al|als)\tnear_func\n" } } */ /* { dg-final { scan-assembler "\t(j(|al|als)|b(|al)c)\tnear_func\n" } } */
/* { dg-final { scan-assembler-not "\tj\tnormal_func\n" } } */ /* { dg-final { scan-assembler-not "\tj\tnormal_func\n" } } */
gcc/testsuite/gcc.target/mips/near-far-4.c
...@@ -13,5 +13,5 @@ NOMIPS16 int test4 () { return normal_func (); } ...@@ -13,5 +13,5 @@ NOMIPS16 int test4 () { return normal_func (); }
/* { dg-final { scan-assembler-not "\tj\tlong_call_func\n" } } */ /* { dg-final { scan-assembler-not "\tj\tlong_call_func\n" } } */
/* { dg-final { scan-assembler-not "\tj\tfar_func\n" } } */ /* { dg-final { scan-assembler-not "\tj\tfar_func\n" } } */
/* { dg-final { scan-assembler "\tj(|al|als)\tnear_func\n" } } */ /* { dg-final { scan-assembler "\t(j(|al|als)|b(|al)c)\tnear_func\n" } } */
/* { dg-final { scan-assembler "\tj(|al|als)\tnormal_func\n" } } */ /* { dg-final { scan-assembler "\t(j(|al|als)|b(|al)c)\tnormal_func\n" } } */
gcc/testsuite/gcc.target/mips/umips-branch-3.c
/* { dg-options "(-mmicromips)" } */ /* { dg-options "(-mmicromips) -mcompact-branches=optimal" } */
/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */ /* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
void MICROMIPS void MICROMIPS
......
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