config.gcc (mips*-*-*): Rename MASK_SPLIT_ADDRS to MASK_SPLIT_ADDRESSES.

	* config.gcc (mips*-*-*): Rename MASK_SPLIT_ADDRS to
	MASK_SPLIT_ADDRESSES.
	* config/mips/mips.h (target_flags, mips_fix_vr4130_string): Delete.
	(MASK_INT64, MASK_LONG64, MASK_SPLIT_ADDR, MASK_NO_FUSED_MADD)
	(MASK_EXPLICIT_RELOCS, MASK_MEMCPY, MASK_SOFT_FLOAT)
	(MASK_FLOAT64, MASK_ABICALLS, MASK_XGOT, MASK_LONG_CALLS)
	(MASK_64BIT, MASK_EMBEDDED_DATA, MASK_BIG_ENDIAN)
	(MASK_SINGLE_FLOAT, MASK_MAD, MASK_4300_MUL_FIX, MASK_MIPS16)
	(MASK_NO_CHECK_ZERO_DIV, MASK_BRANCHLIKELY)
	(MASK_UNINIT_CONST_IN_RODATA, MASK_FIX_R4000, MASK_FIX_R4400)
	(MASK_FIX_SB1, MASK_FIX_VR4120, MASK_VR4130_ALIGN)
	(MASK_FP_EXCEPTIONS, MASK_DIVIDE_BREAKS, MASK_PAIRED_SINGLE)
	(MASK_MIPS3D, MASK_SYM32, MASK_DEBUG, MASK_DEBUG_D)
	(MASK_MIPS_TFILE, TARGET_INT64, TARGET_LONG64, TARGET_FLOAT64)
	(TARGET_64BIT, TARGET_SPLIT_ADDRESSES, TARGET_DEBUG_MODE)
	(TARGET_DEBUG_D_MODE, TARGET_MEMCPY, TARGET_ABICALLS)
	(TARGET_XGOT, TARGET_SOFT_FLOAT, TARGET_HARD_FLOAT)
	(TARGET_LONG_CALLS, TARGET_EMBEDDED_DATA)
	(TARGET_UNINIT_CONST_IN_RODATA, TARGET_BIG_ENDIAN)
	(TARGET_SINGLE_FLOAT, TARGET_DOUBLE_FLOAT, TARGET_MAD)
	(TARGET_FUSED_MADD, TARGET_4300_MUL_FIX, TARGET_CHECK_ZERO_DIV)
	(TARGET_DIVIDE_TRAPS, TARGET_BRANCHLIKELY, TARGET_FIX_SB1)
	(TARGET_FIX_R4000, TARGET_FIX_R4400, TARGET_FIX_VR4120)
	(TARGET_FIX_VR4130, TARGET_VR4130_ALIGN, TARGET_FP_EXCEPTIONS)
	(TARGET_PAIRED_SINGLE_FLOAT, TARGET_MIPS3D, TARGET_SYM32)
	(TARGET_EXPLICIT_RELOCS): Delete.
	(TARGET_SWITCHES, SUBTARGET_TARGET_SWITCHES): Delete.
	(TARGET_OPTIONS): Remove entry for -mfix-vr4130.
	* config/mips/mips.c (TARGET_DEFAULT_TARGET_FLAGS): Define.
	(override_options): Set MASK_LONG64 if -mint64 is given and no
	-mlongXX option is.  Complain about -mint64 -mlong32.
	(override_options, CMP_BUILTINS, mips_bdesc, sb1_desc): Rename
	MASK_PAIRED_SINGLE to MASK_PAIRED_SINGLE_FLOAT.
	* config/mips/mips.opt: New file.

From-SVN: r96452

gcc/ChangeLog

 2005-03-14  Richard Sandiford  <rsandifo@redhat.com>
 
+	* config.gcc (mips*-*-*): Rename MASK_SPLIT_ADDRS to
+	MASK_SPLIT_ADDRESSES.
+	* config/mips/mips.h (target_flags, mips_fix_vr4130_string): Delete.
+	(MASK_INT64, MASK_LONG64, MASK_SPLIT_ADDR, MASK_NO_FUSED_MADD)
+	(MASK_EXPLICIT_RELOCS, MASK_MEMCPY, MASK_SOFT_FLOAT)
+	(MASK_FLOAT64, MASK_ABICALLS, MASK_XGOT, MASK_LONG_CALLS)
+	(MASK_64BIT, MASK_EMBEDDED_DATA, MASK_BIG_ENDIAN)
+	(MASK_SINGLE_FLOAT, MASK_MAD, MASK_4300_MUL_FIX, MASK_MIPS16)
+	(MASK_NO_CHECK_ZERO_DIV, MASK_BRANCHLIKELY)
+	(MASK_UNINIT_CONST_IN_RODATA, MASK_FIX_R4000, MASK_FIX_R4400)
+	(MASK_FIX_SB1, MASK_FIX_VR4120, MASK_VR4130_ALIGN)
+	(MASK_FP_EXCEPTIONS, MASK_DIVIDE_BREAKS, MASK_PAIRED_SINGLE)
+	(MASK_MIPS3D, MASK_SYM32, MASK_DEBUG, MASK_DEBUG_D)
+	(MASK_MIPS_TFILE, TARGET_INT64, TARGET_LONG64, TARGET_FLOAT64)
+	(TARGET_64BIT, TARGET_SPLIT_ADDRESSES, TARGET_DEBUG_MODE)
+	(TARGET_DEBUG_D_MODE, TARGET_MEMCPY, TARGET_ABICALLS)
+	(TARGET_XGOT, TARGET_SOFT_FLOAT, TARGET_HARD_FLOAT)
+	(TARGET_LONG_CALLS, TARGET_EMBEDDED_DATA)
+	(TARGET_UNINIT_CONST_IN_RODATA, TARGET_BIG_ENDIAN)
+	(TARGET_SINGLE_FLOAT, TARGET_DOUBLE_FLOAT, TARGET_MAD)
+	(TARGET_FUSED_MADD, TARGET_4300_MUL_FIX, TARGET_CHECK_ZERO_DIV)
+	(TARGET_DIVIDE_TRAPS, TARGET_BRANCHLIKELY, TARGET_FIX_SB1)
+	(TARGET_FIX_R4000, TARGET_FIX_R4400, TARGET_FIX_VR4120)
+	(TARGET_FIX_VR4130, TARGET_VR4130_ALIGN, TARGET_FP_EXCEPTIONS)
+	(TARGET_PAIRED_SINGLE_FLOAT, TARGET_MIPS3D, TARGET_SYM32)
+	(TARGET_EXPLICIT_RELOCS): Delete.
+	(TARGET_SWITCHES, SUBTARGET_TARGET_SWITCHES): Delete.
+	(TARGET_OPTIONS): Remove entry for -mfix-vr4130.
+	* config/mips/mips.c (TARGET_DEFAULT_TARGET_FLAGS): Define.
+	(override_options): Set MASK_LONG64 if -mint64 is given and no
+	-mlongXX option is.  Complain about -mint64 -mlong32.
+	(override_options, CMP_BUILTINS, mips_bdesc, sb1_desc): Rename
+	MASK_PAIRED_SINGLE to MASK_PAIRED_SINGLE_FLOAT.
+	* config/mips/mips.opt: New file.
+
+2005-03-14  Richard Sandiford  <rsandifo@redhat.com>
+
 	* config.gcc (extra_options): New variable for listing option files.
 	Add ${cpu_type}/${cpu_type}.opt to it if that file exists.
 	* configure.ac (extra_opt_files): New AC_SUBST variable.

gcc/config.gcc

@@ -2712,7 +2712,7 @@ case ${target} in
 	mips*-*-*)
 		if test x$gnu_ld = xyes
 		then
-			target_cpu_default2="MASK_SPLIT_ADDR"
+			target_cpu_default2="MASK_SPLIT_ADDRESSES"
 		fi
 		case ${target} in
 			mips*el-*-*)

gcc/config/mips/mips.c

@@ -746,6 +746,15 @@ const struct mips_cpu_info mips_cpu_info_table[] = {
 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \
   mips_multipass_dfa_lookahead
 
+#undef TARGET_DEFAULT_TARGET_FLAGS
+#define TARGET_DEFAULT_TARGET_FLAGS		\
+  (TARGET_DEFAULT				\
+   | TARGET_CPU_DEFAULT				\
+   | TARGET_ENDIAN_DEFAULT			\
+   | TARGET_FP_EXCEPTIONS_DEFAULT		\
+   | MASK_CHECK_ZERO_DIV			\
+   | MASK_FUSED_MADD)
+
 #undef TARGET_FUNCTION_OK_FOR_SIBCALL
 #define TARGET_FUNCTION_OK_FOR_SIBCALL mips_function_ok_for_sibcall
 
@@ -4308,11 +4317,13 @@ override_options (void)
 
   if ((target_flags_explicit & MASK_LONG64) == 0)
     {
+      if (TARGET_INT64)
+	target_flags |= MASK_LONG64;
       /* If no type size setting options (-mlong64,-mint64,-mlong32)
 	 were used, then set the type sizes.  In the EABI in 64 bit mode,
 	 longs and pointers are 64 bits.  Likewise for the SGI Irix6 N64
 	 ABI.  */
-      if ((mips_abi == ABI_EABI && TARGET_64BIT) || mips_abi == ABI_64)
+      else if ((mips_abi == ABI_EABI && TARGET_64BIT) || mips_abi == ABI_64)
 	target_flags |= MASK_LONG64;
       else
 	target_flags &= ~MASK_LONG64;
@@ -4322,6 +4333,9 @@ override_options (void)
   if (TARGET_INT64)
     warning ("-mint64 is a deprecated option");
 
+  if (TARGET_INT64 && !TARGET_LONG64)
+    error ("unsupported combination: %s", "-mint64 -mlong32");
+
   if (mips_fix_vr4130_string && mips_fix_vr4130_string[0] != 0)
     error ("unrecognized option %<-mfix-vr4130%s%>", mips_fix_vr4130_string);
 
@@ -4456,13 +4470,13 @@ override_options (void)
 
   /* Make sure that the user didn't turn off paired single support when
      MIPS-3D support is requested.  */
-  if (TARGET_MIPS3D && (target_flags_explicit & MASK_PAIRED_SINGLE)
+  if (TARGET_MIPS3D && (target_flags_explicit & MASK_PAIRED_SINGLE_FLOAT)
       && !TARGET_PAIRED_SINGLE_FLOAT)
     error ("-mips3d requires -mpaired-single");
 
-  /* If TARGET_MIPS3D, enable MASK_PAIRED_SINGLE.  */
+  /* If TARGET_MIPS3D, enable MASK_PAIRED_SINGLE_FLOAT.  */
   if (TARGET_MIPS3D)
-    target_flags |= MASK_PAIRED_SINGLE;
+    target_flags |= MASK_PAIRED_SINGLE_FLOAT;
 
   /* Make sure that when TARGET_PAIRED_SINGLE_FLOAT is true, TARGET_FLOAT64
      and TARGET_HARD_FLOAT are both true.  */
@@ -9641,10 +9655,10 @@ struct builtin_description
 
 /* Define all the builtins related to c.cond.fmt condition COND.  */
 #define CMP_BUILTINS(COND)						\
-  MOVTF_BUILTINS (c, COND, MASK_PAIRED_SINGLE),				\
+  MOVTF_BUILTINS (c, COND, MASK_PAIRED_SINGLE_FLOAT),			\
   MOVTF_BUILTINS (cabs, COND, MASK_MIPS3D),				\
   CMP_SCALAR_BUILTINS (cabs, COND, MASK_MIPS3D),			\
-  CMP_PS_BUILTINS (c, COND, MASK_PAIRED_SINGLE),			\
+  CMP_PS_BUILTINS (c, COND, MASK_PAIRED_SINGLE_FLOAT),			\
   CMP_PS_BUILTINS (cabs, COND, MASK_MIPS3D),				\
   CMP_4S_BUILTINS (c, COND),						\
   CMP_4S_BUILTINS (cabs, COND)
@@ -9654,16 +9668,17 @@ struct builtin_description
 
 static const struct builtin_description mips_bdesc[] =
 {
-  DIRECT_BUILTIN (pll_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, MASK_PAIRED_SINGLE),
-  DIRECT_BUILTIN (pul_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, MASK_PAIRED_SINGLE),
-  DIRECT_BUILTIN (plu_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, MASK_PAIRED_SINGLE),
-  DIRECT_BUILTIN (puu_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, MASK_PAIRED_SINGLE),
-  DIRECT_BUILTIN (cvt_ps_s, MIPS_V2SF_FTYPE_SF_SF, MASK_PAIRED_SINGLE),
-  DIRECT_BUILTIN (cvt_s_pl, MIPS_SF_FTYPE_V2SF, MASK_PAIRED_SINGLE),
-  DIRECT_BUILTIN (cvt_s_pu, MIPS_SF_FTYPE_V2SF, MASK_PAIRED_SINGLE),
-  DIRECT_BUILTIN (abs_ps, MIPS_V2SF_FTYPE_V2SF, MASK_PAIRED_SINGLE),
-
-  DIRECT_BUILTIN (alnv_ps, MIPS_V2SF_FTYPE_V2SF_V2SF_INT, MASK_PAIRED_SINGLE),
+  DIRECT_BUILTIN (pll_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, MASK_PAIRED_SINGLE_FLOAT),
+  DIRECT_BUILTIN (pul_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, MASK_PAIRED_SINGLE_FLOAT),
+  DIRECT_BUILTIN (plu_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, MASK_PAIRED_SINGLE_FLOAT),
+  DIRECT_BUILTIN (puu_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, MASK_PAIRED_SINGLE_FLOAT),
+  DIRECT_BUILTIN (cvt_ps_s, MIPS_V2SF_FTYPE_SF_SF, MASK_PAIRED_SINGLE_FLOAT),
+  DIRECT_BUILTIN (cvt_s_pl, MIPS_SF_FTYPE_V2SF, MASK_PAIRED_SINGLE_FLOAT),
+  DIRECT_BUILTIN (cvt_s_pu, MIPS_SF_FTYPE_V2SF, MASK_PAIRED_SINGLE_FLOAT),
+  DIRECT_BUILTIN (abs_ps, MIPS_V2SF_FTYPE_V2SF, MASK_PAIRED_SINGLE_FLOAT),
+
+  DIRECT_BUILTIN (alnv_ps, MIPS_V2SF_FTYPE_V2SF_V2SF_INT,
+		  MASK_PAIRED_SINGLE_FLOAT),
   DIRECT_BUILTIN (addr_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, MASK_MIPS3D),
   DIRECT_BUILTIN (mulr_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, MASK_MIPS3D),
   DIRECT_BUILTIN (cvt_pw_ps, MIPS_V2SF_FTYPE_V2SF, MASK_MIPS3D),
@@ -9692,7 +9707,7 @@ static const struct builtin_description mips_bdesc[] =
 
 static const struct builtin_description sb1_bdesc[] =
 {
-  DIRECT_BUILTIN (sqrt_ps, MIPS_V2SF_FTYPE_V2SF, MASK_PAIRED_SINGLE)
+  DIRECT_BUILTIN (sqrt_ps, MIPS_V2SF_FTYPE_V2SF, MASK_PAIRED_SINGLE_FLOAT)
 };
 
 /* This helps provide a mapping from builtin function codes to bdesc

gcc/config/mips/mips.opt

+mabicalls
+Target Report Mask(ABICALLS)
+Use SVR4-style PIC
+
+mad
+Target Report Var(TARGET_MAD)
+Use PMC-style 'mad' instructions
+
+mbranch-likely
+Target Report Mask(BRANCHLIKELY)
+Use Branch Likely instructions, overriding the architecture default
+
+mcheck-zero-division
+Target Report Mask(CHECK_ZERO_DIV)
+Trap on integer divide by zero
+
+mdivide-breaks
+Target Report Mask(DIVIDE_BREAKS)
+Use branch-and-break sequences to check for integer divide by zero
+
+mdivide-traps
+Target Report InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
+Use trap instructions to check for integer divide by zero
+
+mdouble-float
+Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
+Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
+
+mdebug
+Target Var(TARGET_DEBUG_MODE) Undocumented
+
+mdebugd
+Target Var(TARGET_DEBUG_D_MODE) Undocumented
+
+meb
+Target Report RejectNegative Mask(BIG_ENDIAN)
+Use big-endian byte order
+
+mel
+Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
+Use little-endian byte order
+
+membedded-data
+Target Report Var(TARGET_EMBEDDED_DATA)
+Use ROM instead of RAM
+
+mexplicit-relocs
+Target Report Mask(EXPLICIT_RELOCS)
+Use NewABI-style %reloc() assembly operators
+
+mfix-r4000
+Target Report Mask(FIX_R4000)
+Work around certain R4000 errata
+
+mfix-r4400
+Target Report Mask(FIX_R4400)
+Work around certain R4400 errata
+
+mfix-sb1
+Target Report Var(TARGET_FIX_SB1)
+Work around errata for early SB-1 revision 2 cores
+
+mfix-vr4120
+Target Report Var(TARGET_FIX_VR4120)
+Work around certain VR4120 errata
+
+mfix-vr4130
+Target Report Var(TARGET_FIX_VR4130)
+Work around VR4130 mflo/mfhi errata
+
+mfix4300
+Target Report Var(TARGET_4300_MUL_FIX)
+Work around an early 4300 hardware bug
+
+mfp-exceptions
+Target Report Mask(FP_EXCEPTIONS)
+FP exceptions are enabled
+
+mfp32
+Target Report RejectNegative InverseMask(FLOAT64)
+Use 32-bit floating-point registers
+
+mfp64
+Target Report RejectNegative Mask(FLOAT64)
+Use 64-bit floating-point registers
+
+mfused-madd
+Target Report Mask(FUSED_MADD)
+Generate floating-point multiply-add instructions
+
+mgp32
+Target Report RejectNegative InverseMask(64BIT)
+Use 32-bit general registers
+
+mgp64
+Target Report RejectNegative Mask(64BIT)
+Use 64-bit general registers
+
+mhard-float
+Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
+Allow the use of hardware floating-point instructions
+
+mint64
+Target Report RejectNegative Mask(INT64)
+Use a 64-bit int type
+
+mips16
+Target Report RejectNegative Mask(MIPS16)
+Generate mips16 code
+
+mips3d
+Target Report RejectNegative Mask(MIPS3D)
+Use MIPS-3D instructions
+
+mlong-calls
+Target Report Var(TARGET_LONG_CALLS)
+Use indirect calls
+
+mlong32
+Target Report RejectNegative InverseMask(LONG64, LONG32)
+Use a 32-bit long type
+
+mlong64
+Target Report RejectNegative Mask(LONG64)
+Use a 64-bit long type
+
+mmemcpy
+Target Report Var(TARGET_MEMCPY)
+Don't optimize block moves
+
+mmips-tfile
+Target
+Use the mips-tfile postpass
+
+mno-mips16
+Target Report RejectNegative InverseMask(MIPS16)
+Generate normal-mode code
+
+mno-mips3d
+Target Report RejectNegative InverseMask(MIPS3D)
+Do not use MIPS-3D instructions
+
+mpaired-single
+Target Report Mask(PAIRED_SINGLE_FLOAT)
+Use paired-single floating-point instructions
+
+msingle-float
+Target Report RejectNegative Mask(SINGLE_FLOAT)
+Restrict the use of hardware floating-point instructions to 32-bit operations
+
+msoft-float
+Target Report RejectNegative Mask(SOFT_FLOAT)
+Prevent the use of all hardware floating-point instructions
+
+msplit-addresses
+Target Report Mask(SPLIT_ADDRESSES)
+Optimize lui/addiu address loads
+
+msym32
+Target Report Var(TARGET_SYM32)
+Assume all symbols have 32-bit values
+
+muninit-const-in-rodata
+Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
+Put uninitialized constants in ROM (needs -membedded-data)
+
+mvr4130-align
+Target Report Mask(VR4130_ALIGN)
+Perform VR4130-specific alignment optimizations
+
+mxgot
+Target Report Var(TARGET_XGOT)
+Lift restrictions on GOT size