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riscv-gcc-1
Commit 218155e7 by Bernd Schmidt Committed by Bernd Schmidt
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* gcc.target/i386/lzcnt-1.c: Allow a different lzcntw output register. 

From-SVN: r235431
parent 7db11a5a
Showing with 5 additions and 1 deletions
gcc/testsuite/ChangeLog
2016-04-26 Bernd Schmidt <bschmidt@redhat.com>
* gcc.target/i386/lzcnt-1.c: Allow a different lzcntw output register.
2016-04-25 Richard Biener <rguenther@suse.de> 2016-04-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/70780 PR tree-optimization/70780
......
gcc/testsuite/gcc.target/i386/lzcnt-1.c
/* { dg-do compile } */ /* { dg-do compile } */
/* { dg-options "-O2 -mlzcnt " } */ /* { dg-options "-O2 -mlzcnt " } */
/* { dg-final { scan-assembler "lzcntw\[^\\n]*(%|)ax" } } */ /* { dg-final { scan-assembler "lzcntw\[^\\n]*(%|)\[ad\]\[xi\]" } } */
#include <x86intrin.h> #include <x86intrin.h>
......
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