ia64 specific scheduling bits

From-SVN: r38419

gcc/ChangeLog

+2000-12-21  Bernd Schmidt  <bernds@redhat.com>
+
+	* Makefile.in (out_object_file): Depend on sched-int.h.
+	* rtl.h (single_set_1): New macro.
+	(single_set_2): Renamed from single_set_1 and extra argument added.
+	* rtlanal.c (single_set_2): Likewise.
+
+	* config/ia64/ia64-protos.h (get_bundle_name, ia64_issue_rate,
+	ia64_adjust_cost, ia64_sched_init, ia64_sched_finish,
+	ia64_sched_reorder, ia64_sched_reorder2, ia64_variable_issue):
+	Declare.
+	* config/ia64/ia64.c: Include "sched-int.h".
+	(hard_regno_rename_ok): Also disallow renaming from the various
+	reg_save_* regs.
+	(ia64_safe_itanium_requiers_unit0, ia64_safe_itanium_class,
+	ia64_safe_type, init_insn_group_barriers, group_barrier_needed_p,
+	safe_group_barrier_needed_p, fixup_errata): New static functions.
+	(rtx_needs_barrier):  Handle bundle selector and cycle display
+	insns.
+	(emit_insn_group_barriers): Accept additional FILE * arg.  All
+	callers changed.  Rework to only generate stop bits between
+	basic blocks that haven't been inserted by scheduling.
+	(struct bundle, struct ia64_packet): New structures.
+	(NR_BUNDLES, NR_PACKETS): New macros.
+	(bundle, packets, type_names): New static arrays.
+	(ia64_final_schedule): New variable.
+	(ia64_single_set, insn_matches_slot, ia64_emit_insn_before,
+	gen_nop_type, finish_last_head, rotate_one_bundle, rotate_two_bundles,
+	cycle_end_fill_slots, packet_matches_p, get_split, find_best_insn,
+	find_best_packet, itanium_reorder, dump_current_packet, schedule_stop):
+	New static functions.
+	(ia64_issue_rate, ia64_sched_init, ia64_sched_reorder,
+	ia64_sched_finish, ia64_sched_reorder2, ia64_variable_issue): New
+	functions.
+	(ia64_reorg): Perform a final scheduling pass.
+	* config/ia64/ia64.h (CONST_COSTS): Slightly increase SYMBOL_REF costs.
+	(MAX_CONDITIONAL_EXECUTE, ADJUST_COST, ISSUE_RATE, MD_SCHED_INIT,
+	MD_SCHED_REORDER, MD_SCHED_REORDER2, MD_SCHED_FINISH,
+	MD_SCHED_VARIABLE_ISSUE): Define macros.
+	(ia64_final_schedule): Declare variable.
+	* config/ia64/ia64.md (attr itanium_class): Add some more classes.
+	(attr type): Account for them.
+	(itanium_requires_unit0): New attribute.
+	(function units): Rewrite.
+	(some splitters): Don't create scheduling barriers here.
+	(gr_spill_internal, gr_restore_internal): Don't predicate the
+	pseudo-op.
+	(nop_m, nop_i, nop_f, nop_b, nop_x, cycle_display, cycle_display_1,
+	bundle_selector): New patterns.
+	(insn_group_barrier): Now has an operand.
+	
 2000-12-21  DJ Delorie  <dj@redhat.com>
 
 	* dwarf2out.c (simple_decl_align_in_bits): new

gcc/Makefile.in

@@ -1499,7 +1499,8 @@ dependence.o : dependence.c $(CONFIG_H) system.h $(RTL_H) $(TREE_H) \
 
 $(out_object_file): $(out_file) $(CONFIG_H) $(TREE_H) $(GGC_H) \
    $(RTL_H) $(REGS_H) hard-reg-set.h real.h insn-config.h conditions.h \
-   insn-flags.h output.h $(INSN_ATTR_H) insn-codes.h system.h toplev.h function.h
+   insn-flags.h output.h $(INSN_ATTR_H) insn-codes.h system.h toplev.h \
+   function.h sched-int.h
 	$(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
 		$(out_file) $(OUTPUT_OPTION)
 

gcc/config/ia64/ia64-protos.h

@@ -92,6 +92,14 @@ extern enum reg_class ia64_secondary_reload_class PARAMS((enum reg_class,
 							  rtx));
 extern void ia64_reorg PARAMS((rtx));
 extern void process_for_unwind_directive PARAMS ((FILE *, rtx));
+extern const char *get_bundle_name PARAMS ((int));
+extern int ia64_issue_rate PARAMS ((void));
+extern int ia64_adjust_cost PARAMS ((rtx, rtx, rtx, int));
+extern void ia64_sched_init PARAMS ((FILE *, int, int));
+extern void ia64_sched_finish PARAMS ((FILE *, int));
+extern int ia64_sched_reorder PARAMS ((FILE *, int, rtx *, int *, int));
+extern int ia64_sched_reorder2 PARAMS ((FILE *, int, rtx *, int *, int));
+extern int ia64_variable_issue PARAMS ((FILE *, int, rtx, int));
 #endif /* RTX_CODE */
 
 #ifdef TREE_CODE

gcc/config/ia64/ia64.h

@@ -1849,7 +1849,7 @@ do {									\
   case CONST:								\
   case SYMBOL_REF:							\
   case LABEL_REF:							\
-    return COSTS_N_INSNS (2);
+    return COSTS_N_INSNS (3);
 
 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.  */
 
@@ -1916,19 +1916,6 @@ do {									\
 
 #define NO_FUNCTION_CSE
 
-/* A C statement (sans semicolon) to update the integer variable COST based on
-   the relationship between INSN that is dependent on DEP_INSN through the
-   dependence LINK.  */
-
-/* ??? Investigate.  */
-/* #define ADJUST_COST(INSN, LINK, DEP_INSN, COST) */
-
-/* A C statement (sans semicolon) to update the integer scheduling
-   priority `INSN_PRIORITY(INSN)'.  */
-
-/* ??? Investigate.  */
-/* #define ADJUST_PRIORITY (INSN) */
-
 
 /* Dividing the output into sections.  */
 
@@ -2816,13 +2803,43 @@ do {									\
    BRANCH_COST+1 is the default if the machine does not use
    cc0, and 1 if it does use cc0.  */
 /* ??? Investigate.  */
-/* #define MAX_CONDITIONAL_EXECUTE */
+#define MAX_CONDITIONAL_EXECUTE 12
+
+/* A C statement (sans semicolon) to update the integer scheduling
+   priority `INSN_PRIORITY(INSN)'.  */
+
+/* ??? Investigate.  */
+/* #define ADJUST_PRIORITY (INSN) */
+
+/* A C statement (sans semicolon) to update the integer variable COST
+   based on the relationship between INSN that is dependent on
+   DEP_INSN through the dependence LINK.  The default is to make no
+   adjustment to COST.  This can be used for example to specify to
+   the scheduler that an output- or anti-dependence does not incur
+   the same cost as a data-dependence.  */
+
+#define ADJUST_COST(insn,link,dep_insn,cost) \
+  (cost) = ia64_adjust_cost(insn, link, dep_insn, cost)
+
+#define ISSUE_RATE ia64_issue_rate ()
+
+#define MD_SCHED_INIT(DUMP, SCHED_VERBOSE, MAX_READY) \
+  ia64_sched_init (DUMP, SCHED_VERBOSE, MAX_READY)
+
+#define MD_SCHED_REORDER(DUMP, SCHED_VERBOSE, READY, N_READY, CLOCK, CIM) \
+  (CIM) = ia64_sched_reorder (DUMP, SCHED_VERBOSE, READY, &N_READY, 0)
+
+#define MD_SCHED_REORDER2(DUMP, SCHED_VERBOSE, READY, N_READY, CLOCK, CIM) \
+  (CIM) = ia64_sched_reorder2 (DUMP, SCHED_VERBOSE, READY, &N_READY, 1)
 
-/* Indicate how many instructions can be issued at the same time.  */
+#define MD_SCHED_FINISH(DUMP, SCHED_VERBOSE) \
+  ia64_sched_finish (DUMP, SCHED_VERBOSE)
 
-/* ??? For now, we just schedule to fill bundles.  */
+#define MD_SCHED_VARIABLE_ISSUE(DUMP, SCHED_VERBOSE, INSN, CAN_ISSUE_MORE) \
+  ((CAN_ISSUE_MORE)							   \
+   = ia64_variable_issue (DUMP, SCHED_VERBOSE, INSN, CAN_ISSUE_MORE))
 
-#define ISSUE_RATE 3
+extern int ia64_final_schedule;
 
 #define IA64_UNWIND_INFO	1
 #define HANDLER_SECTION fprintf (asm_out_file, "\t.personality\t__ia64_personality_v1\n\t.handlerdata\n");

gcc/rtl.h

@@ -1346,6 +1346,7 @@ extern void set_unique_reg_note         PARAMS ((rtx, enum reg_note, rtx));
 		       ? (GET_CODE (PATTERN (I)) == SET \
 			  ? PATTERN (I) : single_set_1 (I)) \
 		       : NULL_RTX)
+#define single_set_1(I) single_set_2 (I, PATTERN (I))
 
 extern int rtx_unstable_p		PARAMS ((rtx));
 extern int rtx_varies_p			PARAMS ((rtx));
@@ -1365,7 +1366,7 @@ extern int no_jumps_between_p		PARAMS ((rtx, rtx));
 extern int modified_in_p		PARAMS ((rtx, rtx));
 extern int insn_dependent_p		PARAMS ((rtx, rtx));
 extern int reg_set_p			PARAMS ((rtx, rtx));
-extern rtx single_set_1			PARAMS ((rtx));
+extern rtx single_set_2			PARAMS ((rtx, rtx));
 extern int multiple_sets		PARAMS ((rtx));
 extern rtx find_last_value		PARAMS ((rtx, rtx *, rtx, int));
 extern int refers_to_regno_p		PARAMS ((unsigned int, unsigned int,

gcc/rtlanal.c

@@ -860,12 +860,11 @@ insn_dependent_p_1 (x, pat, data)
    will not be used, which we ignore.  */
 
 rtx
-single_set_1 (insn)
-     rtx insn;
+single_set_2 (insn, pat)
+     rtx insn, pat;
 {
   rtx set = NULL;
   int set_verified = 1;
-  rtx pat = PATTERN (insn);
   int i;
 
   if (GET_CODE (pat) == PARALLEL)