Commit 20b32e50 by Wilco Dijkstra Committed by Jiong Wang

[AArch64] Fix cost for Q register moves

2014-09-12  Wilco Dijkstra  <wdijkstr@arm.com>

  * gcc/config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
  move handling.
  (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves are
  now handled correctly.

From-SVN: r215207
parent 3be07662
2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com> 2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
* config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
move handling.
(generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
are now handled correctly.
2014-09-12 Wilco Dijkstra <wilco.dijkstra@arm.com>
* config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost * config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
handling of CALLER_SAVE_REGS and POINTER_REGS. handling of CALLER_SAVE_REGS and POINTER_REGS.
...@@ -215,10 +215,7 @@ static const struct cpu_regmove_cost generic_regmove_cost = ...@@ -215,10 +215,7 @@ static const struct cpu_regmove_cost generic_regmove_cost =
NAMED_PARAM (GP2GP, 1), NAMED_PARAM (GP2GP, 1),
NAMED_PARAM (GP2FP, 2), NAMED_PARAM (GP2FP, 2),
NAMED_PARAM (FP2GP, 2), NAMED_PARAM (FP2GP, 2),
/* We currently do not provide direct support for TFmode Q->Q move. NAMED_PARAM (FP2FP, 2)
Therefore we need to raise the cost above 2 in order to have
reload handle the situation. */
NAMED_PARAM (FP2FP, 4)
}; };
/* Generic costs for vector insn classes. */ /* Generic costs for vector insn classes. */
...@@ -5961,7 +5958,7 @@ aarch64_register_move_cost (enum machine_mode mode, ...@@ -5961,7 +5958,7 @@ aarch64_register_move_cost (enum machine_mode mode,
secondary reload. A general register is used as a scratch to move secondary reload. A general register is used as a scratch to move
the upper DI value and the lower DI value is moved directly, the upper DI value and the lower DI value is moved directly,
hence the cost is the sum of three moves. */ hence the cost is the sum of three moves. */
if (! TARGET_SIMD && GET_MODE_SIZE (mode) == 128) if (! TARGET_SIMD && GET_MODE_SIZE (mode) == 16)
return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP; return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP;
return regmove_cost->FP2FP; return regmove_cost->FP2FP;
......
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