Skip to content

R
riscv-gcc-1
Commit 20955f5a by Georg-Johann Lay Committed by Georg-Johann Lay
Options

re PR target/53033 ([avr]: Wrong register number for 3-byte loads via X) 

	PR target/53033
	* config/avr/avr.c (avr_out_load_psi): Fix assembler template for
	the case *(X+const).

From-SVN: r186588
parent e4eb230d
Showing with 14 additions and 7 deletions
gcc/ChangeLog
2012-04-19 Georg-Johann Lay <avr@gjlay.de>
PR target/53033
* config/avr/avr.c (avr_out_load_psi): Fix assembler template for
the case *(X+const).
2012-04-19 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* config/arm/sync.md (sync_optab): Change ior attribute to "or".
......
gcc/config/avr/avr.c
......@@ -3476,15 +3476,16 @@ avr_out_load_psi (rtx insn, rtx *op, int *plen)
"mov r27,__tmp_reg__", op, plen, -6);
}
avr_asm_len ("adiw r26,%o1" CR_TAB
"ld r24,X+" CR_TAB
"ld r25,X+" CR_TAB
"ld r26,X", op, plen, -4);
avr_asm_len ("adiw r26,%o1" CR_TAB
"ld %A0,X+" CR_TAB
"ld %B0,X+" CR_TAB
"ld %C0,X", op, plen, -4);
if (reg_dest != REG_X - 2)
avr_asm_len ("sbiw r26,%o1+2", op, plen, 1);
if (reg_dest != REG_W
&& !reg_unused_after (insn, XEXP (base, 0)))
avr_asm_len ("sbiw r26,%o1+2", op, plen, 1);
return "";
return "";
}
if (reg_dest == reg_base)
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment