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Commit 2069d6fc by Marc Glisse Committed by Marc Glisse
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xmmintrin.h (_mm_add_ps, [...]): Use vector extensions instead of builtins. 

2014-11-15  Marc Glisse  <marc.glisse@inria.fr>

gcc/
	* config/i386/xmmintrin.h (_mm_add_ps, _mm_sub_ps, _mm_mul_ps,
	_mm_div_ps, _mm_store_ss, _mm_cvtss_f32): Use vector extensions
	instead of builtins.
	* config/i386/emmintrin.h (__v2du, __v4su, __v8hu, __v16qu): New
	typedefs.
	(_mm_sqrt_sd): Fix comment.
	(_mm_add_epi8, _mm_add_epi16, _mm_add_epi32, _mm_add_epi64,
	_mm_sub_epi8, _mm_sub_epi16, _mm_sub_epi32, _mm_sub_epi64,
	_mm_mullo_epi16, _mm_cmpeq_epi8, _mm_cmpeq_epi16, _mm_cmpeq_epi32,
	_mm_cmplt_epi8, _mm_cmplt_epi16, _mm_cmplt_epi32, _mm_cmpgt_epi8,
	_mm_cmpgt_epi16, _mm_cmpgt_epi32, _mm_and_si128, _mm_or_si128,
	_mm_xor_si128, _mm_store_sd, _mm_cvtsd_f64, _mm_storeh_pd,
	_mm_cvtsi128_si64, _mm_cvtsi128_si64x, _mm_add_pd, _mm_sub_pd,
	_mm_mul_pd, _mm_div_pd, _mm_storel_epi64, _mm_movepi64_pi64):
	Use vector extensions instead of builtins.
	* config/i386/smmintrin.h (_mm_cmpeq_epi64, _mm_cmpgt_epi64,
	_mm_mullo_epi32): Likewise.
	* config/i386/avxintrin.h (__v4du, __v8su, __v16hu, __v32qu):
	New typedefs.
	(_mm256_add_pd, _mm256_add_ps, _mm256_div_pd, _mm256_div_ps,
	_mm256_mul_pd, _mm256_mul_ps, _mm256_sub_pd, _mm256_sub_ps):
	Use vector extensions instead of builtins.
	* config/i386/avx2intrin.h (_mm256_cmpeq_epi8, _mm256_cmpeq_epi16,
	_mm256_cmpeq_epi32, _mm256_cmpeq_epi64, _mm256_cmpgt_epi8,
	_mm256_cmpgt_epi16, _mm256_cmpgt_epi32, _mm256_cmpgt_epi64,
	_mm256_and_si256, _mm256_or_si256, _mm256_xor_si256, _mm256_add_epi8,
	_mm256_add_epi16, _mm256_add_epi32, _mm256_add_epi64,
	_mm256_mullo_epi16, _mm256_mullo_epi32, _mm256_sub_epi8,
	_mm256_sub_epi16, _mm256_sub_epi32, _mm256_sub_epi64): Likewise.
	* config/i386/avx512fintrin.h (__v8du, __v16su, __v32hu, __v64qu):
	New typedefs.
	(_mm512_or_si512, _mm512_or_epi32, _mm512_or_epi64, _mm512_xor_si512,
	_mm512_xor_epi32, _mm512_xor_epi64, _mm512_and_si512,
	_mm512_and_epi32, _mm512_and_epi64, _mm512_mullo_epi32,
	_mm512_add_epi64, _mm512_sub_epi64, _mm512_add_epi32,
	_mm512_sub_epi32, _mm512_add_pd, _mm512_add_ps, _mm512_sub_pd,
	_mm512_sub_ps, _mm512_mul_pd, _mm512_mul_ps, _mm512_div_pd,
	_mm512_div_ps): Use vector extensions instead of builtins.
	* config/i386/avx512bwintrin.h (_mm512_mullo_epi16, _mm512_add_epi8,
	_mm512_sub_epi8, _mm512_sub_epi16, _mm512_add_epi16): Likewise.
	* config/i386/avx512dqintrin.h (_mm512_mullo_epi64): Likewise.
	* config/i386/avx512vldqintrin.h (_mm256_mullo_epi64, _mm_mullo_epi64):
	Likewise.

gcc/testsuite/
	* gcc.target/i386/intrinsics_opt-1.c: New testcase.
	* gcc.target/i386/intrinsics_opt-2.c: Likewise.
	* gcc.target/i386/intrinsics_opt-3.c: Likewise.
	* gcc.target/i386/intrinsics_opt-4.c: Likewise.

From-SVN: r217608
parent ca9a04da
Showing with 218 additions and 232 deletions
gcc/ChangeLog
2014-11-15 Marc Glisse <marc.glisse@inria.fr>
* config/i386/xmmintrin.h (_mm_add_ps, _mm_sub_ps, _mm_mul_ps,
_mm_div_ps, _mm_store_ss, _mm_cvtss_f32): Use vector extensions
instead of builtins.
* config/i386/emmintrin.h (__v2du, __v4su, __v8hu, __v16qu): New
typedefs.
(_mm_sqrt_sd): Fix comment.
(_mm_add_epi8, _mm_add_epi16, _mm_add_epi32, _mm_add_epi64,
_mm_sub_epi8, _mm_sub_epi16, _mm_sub_epi32, _mm_sub_epi64,
_mm_mullo_epi16, _mm_cmpeq_epi8, _mm_cmpeq_epi16, _mm_cmpeq_epi32,
_mm_cmplt_epi8, _mm_cmplt_epi16, _mm_cmplt_epi32, _mm_cmpgt_epi8,
_mm_cmpgt_epi16, _mm_cmpgt_epi32, _mm_and_si128, _mm_or_si128,
_mm_xor_si128, _mm_store_sd, _mm_cvtsd_f64, _mm_storeh_pd,
_mm_cvtsi128_si64, _mm_cvtsi128_si64x, _mm_add_pd, _mm_sub_pd,
_mm_mul_pd, _mm_div_pd, _mm_storel_epi64, _mm_movepi64_pi64):
Use vector extensions instead of builtins.
* config/i386/smmintrin.h (_mm_cmpeq_epi64, _mm_cmpgt_epi64,
_mm_mullo_epi32): Likewise.
* config/i386/avxintrin.h (__v4du, __v8su, __v16hu, __v32qu):
New typedefs.
(_mm256_add_pd, _mm256_add_ps, _mm256_div_pd, _mm256_div_ps,
_mm256_mul_pd, _mm256_mul_ps, _mm256_sub_pd, _mm256_sub_ps):
Use vector extensions instead of builtins.
* config/i386/avx2intrin.h (_mm256_cmpeq_epi8, _mm256_cmpeq_epi16,
_mm256_cmpeq_epi32, _mm256_cmpeq_epi64, _mm256_cmpgt_epi8,
_mm256_cmpgt_epi16, _mm256_cmpgt_epi32, _mm256_cmpgt_epi64,
_mm256_and_si256, _mm256_or_si256, _mm256_xor_si256, _mm256_add_epi8,
_mm256_add_epi16, _mm256_add_epi32, _mm256_add_epi64,
_mm256_mullo_epi16, _mm256_mullo_epi32, _mm256_sub_epi8,
_mm256_sub_epi16, _mm256_sub_epi32, _mm256_sub_epi64): Likewise.
* config/i386/avx512fintrin.h (__v8du, __v16su, __v32hu, __v64qu):
New typedefs.
(_mm512_or_si512, _mm512_or_epi32, _mm512_or_epi64, _mm512_xor_si512,
_mm512_xor_epi32, _mm512_xor_epi64, _mm512_and_si512,
_mm512_and_epi32, _mm512_and_epi64, _mm512_mullo_epi32,
_mm512_add_epi64, _mm512_sub_epi64, _mm512_add_epi32,
_mm512_sub_epi32, _mm512_add_pd, _mm512_add_ps, _mm512_sub_pd,
_mm512_sub_ps, _mm512_mul_pd, _mm512_mul_ps, _mm512_div_pd,
_mm512_div_ps): Use vector extensions instead of builtins.
* config/i386/avx512bwintrin.h (_mm512_mullo_epi16, _mm512_add_epi8,
_mm512_sub_epi8, _mm512_sub_epi16, _mm512_add_epi16): Likewise.
* config/i386/avx512dqintrin.h (_mm512_mullo_epi64): Likewise.
* config/i386/avx512vldqintrin.h (_mm256_mullo_epi64, _mm_mullo_epi64):
Likewise.
2014-11-15 Jan Hubicka <hubicka@ucw.cz>
* lto-streamer-out.c (hash_tree): Use cl_optimization_hash.
gcc/config/i386/avx2intrin.h
......@@ -104,28 +104,28 @@ extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_add_epi8 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_paddb256 ((__v32qi)__A, (__v32qi)__B);
return (__m256i) ((__v32qu)__A + (__v32qu)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_add_epi16 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_paddw256 ((__v16hi)__A, (__v16hi)__B);
return (__m256i) ((__v16hu)__A + (__v16hu)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_add_epi32 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_paddd256 ((__v8si)__A, (__v8si)__B);
return (__m256i) ((__v8su)__A + (__v8su)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_add_epi64 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_paddq256 ((__v4di)__A, (__v4di)__B);
return (__m256i) ((__v4du)__A + (__v4du)__B);
}
extern __inline __m256i
......@@ -178,7 +178,7 @@ extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_and_si256 (__m256i __A, __m256i __B)
{
return (__m256i) __builtin_ia32_andsi256 ((__v4di)__A, (__v4di)__B);
return (__m256i) ((__v4du)__A & (__v4du)__B);
}
extern __inline __m256i
......@@ -230,59 +230,56 @@ extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpeq_epi8 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_pcmpeqb256 ((__v32qi)__A, (__v32qi)__B);
return (__m256i) ((__v32qi)__A == (__v32qi)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpeq_epi16 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_pcmpeqw256 ((__v16hi)__A, (__v16hi)__B);
return (__m256i) ((__v16hi)__A == (__v16hi)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpeq_epi32 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_pcmpeqd256 ((__v8si)__A, (__v8si)__B);
return (__m256i) ((__v8si)__A == (__v8si)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpeq_epi64 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_pcmpeqq256 ((__v4di)__A, (__v4di)__B);
return (__m256i) ((__v4di)__A == (__v4di)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpgt_epi8 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_pcmpgtb256 ((__v32qi)__A,
(__v32qi)__B);
return (__m256i) ((__v32qi)__A > (__v32qi)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpgt_epi16 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_pcmpgtw256 ((__v16hi)__A,
(__v16hi)__B);
return (__m256i) ((__v16hi)__A > (__v16hi)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpgt_epi32 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_pcmpgtd256 ((__v8si)__A,
(__v8si)__B);
return (__m256i) ((__v8si)__A > (__v8si)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpgt_epi64 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_pcmpgtq256 ((__v4di)__A, (__v4di)__B);
return (__m256i) ((__v4di)__A > (__v4di)__B);
}
extern __inline __m256i
......@@ -555,14 +552,14 @@ extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mullo_epi16 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_pmullw256 ((__v16hi)__A, (__v16hi)__B);
return (__m256i) ((__v16hu)__A * (__v16hu)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mullo_epi32 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_pmulld256 ((__v8si)__A, (__v8si)__B);
return (__m256i) ((__v8su)__A * (__v8su)__B);
}
extern __inline __m256i
......@@ -576,7 +573,7 @@ extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_or_si256 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_por256 ((__v4di)__A, (__v4di)__B);
return (__m256i) ((__v4du)__A | (__v4du)__B);
}
extern __inline __m256i
......@@ -785,28 +782,28 @@ extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_sub_epi8 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_psubb256 ((__v32qi)__A, (__v32qi)__B);
return (__m256i) ((__v32qu)__A - (__v32qu)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_sub_epi16 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_psubw256 ((__v16hi)__A, (__v16hi)__B);
return (__m256i) ((__v16hu)__A - (__v16hu)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_sub_epi32 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_psubd256 ((__v8si)__A, (__v8si)__B);
return (__m256i) ((__v8su)__A - (__v8su)__B);
}
extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_sub_epi64 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_psubq256 ((__v4di)__A, (__v4di)__B);
return (__m256i) ((__v4du)__A - (__v4du)__B);
}
extern __inline __m256i
......@@ -897,7 +894,7 @@ extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_xor_si256 (__m256i __A, __m256i __B)
{
return (__m256i)__builtin_ia32_pxor256 ((__v4di)__A, (__v4di)__B);
return (__m256i) ((__v4du)__A ^ (__v4du)__B);
}
extern __inline __m256i
......
gcc/config/i386/avx512bwintrin.h
......@@ -464,11 +464,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mullo_epi16 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_pmullw512_mask ((__v32hi) __A,
(__v32hi) __B,
(__v32hi)
_mm512_setzero_hi (),
(__mmask32) -1);
return (__m512i) ((__v32hu) __A * (__v32hu) __B);
}
extern __inline __m512i
......@@ -673,11 +669,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_add_epi8 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_paddb512_mask ((__v64qi) __A,
(__v64qi) __B,
(__v64qi)
_mm512_setzero_qi (),
(__mmask64) -1);
return (__m512i) ((__v64qu) __A + (__v64qu) __B);
}
extern __inline __m512i
......@@ -706,11 +698,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_sub_epi8 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_psubb512_mask ((__v64qi) __A,
(__v64qi) __B,
(__v64qi)
_mm512_setzero_qi (),
(__mmask64) -1);
return (__m512i) ((__v64qu) __A - (__v64qu) __B);
}
extern __inline __m512i
......@@ -904,11 +892,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_sub_epi16 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_psubw512_mask ((__v32hi) __A,
(__v32hi) __B,
(__v32hi)
_mm512_setzero_hi (),
(__mmask32) -1);
return (__m512i) ((__v32hu) __A - (__v32hu) __B);
}
extern __inline __m512i
......@@ -1003,11 +987,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_add_epi16 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_paddw512_mask ((__v32hi) __A,
(__v32hi) __B,
(__v32hi)
_mm512_setzero_hi (),
(__mmask32) -1);
return (__m512i) ((__v32hu) __A + (__v32hu) __B);
}
extern __inline __m512i
......
gcc/config/i386/avx512dqintrin.h
......@@ -225,11 +225,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mullo_epi64 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_pmullq512_mask ((__v8di) __A,
(__v8di) __B,
(__v8di)
_mm512_setzero_si512 (),
(__mmask8) -1);
return (__m512i) ((__v8du) __A * (__v8du) __B);
}
extern __inline __m512i
......
gcc/config/i386/avx512fintrin.h
......@@ -38,9 +38,13 @@
typedef double __v8df __attribute__ ((__vector_size__ (64)));
typedef float __v16sf __attribute__ ((__vector_size__ (64)));
typedef long long __v8di __attribute__ ((__vector_size__ (64)));
typedef unsigned long long __v8du __attribute__ ((__vector_size__ (64)));
typedef int __v16si __attribute__ ((__vector_size__ (64)));
typedef unsigned int __v16su __attribute__ ((__vector_size__ (64)));
typedef short __v32hi __attribute__ ((__vector_size__ (64)));
typedef unsigned short __v32hu __attribute__ ((__vector_size__ (64)));
typedef char __v64qi __attribute__ ((__vector_size__ (64)));
typedef unsigned char __v64qu __attribute__ ((__vector_size__ (64)));
/* The Intel API is flexible enough that we must allow aliasing with other
vector types, and their scalar components. */
......@@ -515,11 +519,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mullo_epi32 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_pmulld512_mask ((__v16si) __A,
(__v16si) __B,
(__v16si)
_mm512_undefined_si512 (),
(__mmask16) -1);
return (__m512i) ((__v16su) __A * (__v16su) __B);
}
extern __inline __m512i
......@@ -642,11 +642,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_add_epi64 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_paddq512_mask ((__v8di) __A,
(__v8di) __B,
(__v8di)
_mm512_undefined_si512 (),
(__mmask8) -1);
return (__m512i) ((__v8du) __A + (__v8du) __B);
}
extern __inline __m512i
......@@ -674,11 +670,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_sub_epi64 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_psubq512_mask ((__v8di) __A,
(__v8di) __B,
(__v8di)
_mm512_undefined_pd (),
(__mmask8) -1);
return (__m512i) ((__v8du) __A - (__v8du) __B);
}
extern __inline __m512i
......@@ -802,11 +794,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_add_epi32 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_paddd512_mask ((__v16si) __A,
(__v16si) __B,
(__v16si)
_mm512_undefined_si512 (),
(__mmask16) -1);
return (__m512i) ((__v16su) __A + (__v16su) __B);
}
extern __inline __m512i
......@@ -865,11 +853,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_sub_epi32 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_psubd512_mask ((__v16si) __A,
(__v16si) __B,
(__v16si)
_mm512_undefined_si512 (),
(__mmask16) -1);
return (__m512i) ((__v16su) __A - (__v16su) __B);
}
extern __inline __m512i
......@@ -6797,22 +6781,14 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_or_si512 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_pord512_mask ((__v16si) __A,
(__v16si) __B,
(__v16si)
_mm512_undefined_si512 (),
(__mmask16) -1);
return (__m512i) ((__v16su) __A | (__v16su) __B);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_or_epi32 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_pord512_mask ((__v16si) __A,
(__v16si) __B,
(__v16si)
_mm512_undefined_si512 (),
(__mmask16) -1);
return (__m512i) ((__v16su) __A | (__v16su) __B);
}
extern __inline __m512i
......@@ -6840,11 +6816,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_or_epi64 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_porq512_mask ((__v8di) __A,
(__v8di) __B,
(__v8di)
_mm512_undefined_si512 (),
(__mmask8) -1);
return (__m512i) ((__v8du) __A | (__v8du) __B);
}
extern __inline __m512i
......@@ -6872,22 +6844,14 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_xor_si512 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_pxord512_mask ((__v16si) __A,
(__v16si) __B,
(__v16si)
_mm512_undefined_si512 (),
(__mmask16) -1);
return (__m512i) ((__v16su) __A ^ (__v16su) __B);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_xor_epi32 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_pxord512_mask ((__v16si) __A,
(__v16si) __B,
(__v16si)
_mm512_undefined_si512 (),
(__mmask16) -1);
return (__m512i) ((__v16su) __A ^ (__v16su) __B);
}
extern __inline __m512i
......@@ -6915,11 +6879,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_xor_epi64 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_pxorq512_mask ((__v8di) __A,
(__v8di) __B,
(__v8di)
_mm512_undefined_si512 (),
(__mmask8) -1);
return (__m512i) ((__v8du) __A ^ (__v8du) __B);
}
extern __inline __m512i
......@@ -7128,22 +7088,14 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_and_si512 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_pandd512_mask ((__v16si) __A,
(__v16si) __B,
(__v16si)
_mm512_undefined_si512 (),
(__mmask16) -1);
return (__m512i) ((__v16su) __A & (__v16su) __B);
}
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_and_epi32 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_pandd512_mask ((__v16si) __A,
(__v16si) __B,
(__v16si)
_mm512_undefined_si512 (),
(__mmask16) -1);
return (__m512i) ((__v16su) __A & (__v16su) __B);
}
extern __inline __m512i
......@@ -7171,11 +7123,7 @@ extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_and_epi64 (__m512i __A, __m512i __B)
{
return (__m512i) __builtin_ia32_pandq512_mask ((__v8di) __A,
(__v8di) __B,
(__v8di)
_mm512_undefined_si512 (),
(__mmask8) -1);
return (__m512i) ((__v8du) __A & (__v8du) __B);
}
extern __inline __m512i
......@@ -10749,12 +10697,7 @@ extern __inline __m512d
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_add_pd (__m512d __A, __m512d __B)
{
return (__m512d) __builtin_ia32_addpd512_mask ((__v8df) __A,
(__v8df) __B,
(__v8df)
_mm512_undefined_pd (),
(__mmask8) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512d) ((__v8df)__A + (__v8df)__B);
}
extern __inline __m512d
......@@ -10784,12 +10727,7 @@ extern __inline __m512
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_add_ps (__m512 __A, __m512 __B)
{
return (__m512) __builtin_ia32_addps512_mask ((__v16sf) __A,
(__v16sf) __B,
(__v16sf)
_mm512_undefined_ps (),
(__mmask16) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512) ((__v16sf)__A + (__v16sf)__B);
}
extern __inline __m512
......@@ -10819,12 +10757,7 @@ extern __inline __m512d
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_sub_pd (__m512d __A, __m512d __B)
{
return (__m512d) __builtin_ia32_subpd512_mask ((__v8df) __A,
(__v8df) __B,
(__v8df)
_mm512_undefined_pd (),
(__mmask8) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512d) ((__v8df)__A - (__v8df)__B);
}
extern __inline __m512d
......@@ -10854,12 +10787,7 @@ extern __inline __m512
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_sub_ps (__m512 __A, __m512 __B)
{
return (__m512) __builtin_ia32_subps512_mask ((__v16sf) __A,
(__v16sf) __B,
(__v16sf)
_mm512_undefined_ps (),
(__mmask16) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512) ((__v16sf)__A - (__v16sf)__B);
}
extern __inline __m512
......@@ -10889,12 +10817,7 @@ extern __inline __m512d
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mul_pd (__m512d __A, __m512d __B)
{
return (__m512d) __builtin_ia32_mulpd512_mask ((__v8df) __A,
(__v8df) __B,
(__v8df)
_mm512_undefined_pd (),
(__mmask8) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512d) ((__v8df)__A * (__v8df)__B);
}
extern __inline __m512d
......@@ -10924,12 +10847,7 @@ extern __inline __m512
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mul_ps (__m512 __A, __m512 __B)
{
return (__m512) __builtin_ia32_mulps512_mask ((__v16sf) __A,
(__v16sf) __B,
(__v16sf)
_mm512_undefined_ps (),
(__mmask16) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512) ((__v16sf)__A * (__v16sf)__B);
}
extern __inline __m512
......@@ -10959,12 +10877,7 @@ extern __inline __m512d
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_div_pd (__m512d __M, __m512d __V)
{
return (__m512d) __builtin_ia32_divpd512_mask ((__v8df) __M,
(__v8df) __V,
(__v8df)
_mm512_undefined_pd (),
(__mmask8) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512d) ((__v8df)__M / (__v8df)__V);
}
extern __inline __m512d
......@@ -10994,12 +10907,7 @@ extern __inline __m512
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_div_ps (__m512 __A, __m512 __B)
{
return (__m512) __builtin_ia32_divps512_mask ((__v16sf) __A,
(__v16sf) __B,
(__v16sf)
_mm512_undefined_ps (),
(__mmask16) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512) ((__v16sf)__A / (__v16sf)__B);
}
extern __inline __m512
......
gcc/config/i386/avx512vldqintrin.h
......@@ -544,11 +544,7 @@ extern __inline __m256i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mullo_epi64 (__m256i __A, __m256i __B)
{
return (__m256i) __builtin_ia32_pmullq256_mask ((__v4di) __A,
(__v4di) __B,
(__v4di)
_mm256_setzero_si256 (),
(__mmask8) -1);
return (__m256i) ((__v4du) __A * (__v4du) __B);
}
extern __inline __m256i
......@@ -577,11 +573,7 @@ extern __inline __m128i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_mullo_epi64 (__m128i __A, __m128i __B)
{
return (__m128i) __builtin_ia32_pmullq128_mask ((__v2di) __A,
(__v2di) __B,
(__v2di)
_mm_setzero_di (),
(__mmask8) -1);
return (__m128i) ((__v2du) __A * (__v2du) __B);
}
extern __inline __m128i
......
gcc/config/i386/avxintrin.h
......@@ -41,9 +41,13 @@
typedef double __v4df __attribute__ ((__vector_size__ (32)));
typedef float __v8sf __attribute__ ((__vector_size__ (32)));
typedef long long __v4di __attribute__ ((__vector_size__ (32)));
typedef unsigned long long __v4du __attribute__ ((__vector_size__ (32)));
typedef int __v8si __attribute__ ((__vector_size__ (32)));
typedef unsigned int __v8su __attribute__ ((__vector_size__ (32)));
typedef short __v16hi __attribute__ ((__vector_size__ (32)));
typedef unsigned short __v16hu __attribute__ ((__vector_size__ (32)));
typedef char __v32qi __attribute__ ((__vector_size__ (32)));
typedef unsigned char __v32qu __attribute__ ((__vector_size__ (32)));
/* The Intel API is flexible enough that we must allow aliasing with other
vector types, and their scalar components. */
......@@ -124,13 +128,13 @@ typedef double __m256d __attribute__ ((__vector_size__ (32),
extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_add_pd (__m256d __A, __m256d __B)
{
return (__m256d) __builtin_ia32_addpd256 ((__v4df)__A, (__v4df)__B);
return (__m256d) ((__v4df)__A + (__v4df)__B);
}
extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_add_ps (__m256 __A, __m256 __B)
{
return (__m256) __builtin_ia32_addps256 ((__v8sf)__A, (__v8sf)__B);
return (__m256) ((__v8sf)__A + (__v8sf)__B);
}
extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
......@@ -218,13 +222,13 @@ _mm256_blendv_ps (__m256 __X, __m256 __Y, __m256 __M)
extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_div_pd (__m256d __A, __m256d __B)
{
return (__m256d) __builtin_ia32_divpd256 ((__v4df)__A, (__v4df)__B);
return (__m256d) ((__v4df)__A / (__v4df)__B);
}
extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_div_ps (__m256 __A, __m256 __B)
{
return (__m256) __builtin_ia32_divps256 ((__v8sf)__A, (__v8sf)__B);
return (__m256) ((__v8sf)__A / (__v8sf)__B);
}
/* Dot product instructions with mask-defined summing and zeroing parts
......@@ -295,13 +299,13 @@ _mm256_min_ps (__m256 __A, __m256 __B)
extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mul_pd (__m256d __A, __m256d __B)
{
return (__m256d) __builtin_ia32_mulpd256 ((__v4df)__A, (__v4df)__B);
return (__m256d) ((__v4df)__A * (__v4df)__B);
}
extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mul_ps (__m256 __A, __m256 __B)
{
return (__m256) __builtin_ia32_mulps256 ((__v8sf)__A, (__v8sf)__B);
return (__m256) ((__v8sf)__A * (__v8sf)__B);
}
extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
......@@ -343,13 +347,13 @@ _mm256_shuffle_ps (__m256 __A, __m256 __B, const int __mask)
extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_sub_pd (__m256d __A, __m256d __B)
{
return (__m256d) __builtin_ia32_subpd256 ((__v4df)__A, (__v4df)__B);
return (__m256d) ((__v4df)__A - (__v4df)__B);
}
extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_sub_ps (__m256 __A, __m256 __B)
{
return (__m256) __builtin_ia32_subps256 ((__v8sf)__A, (__v8sf)__B);
return (__m256) ((__v8sf)__A - (__v8sf)__B);
}
extern __inline __m256d __attribute__((__gnu_inline__, __always_inline__, __artificial__))
......
gcc/config/i386/smmintrin.h
......@@ -267,7 +267,7 @@ _mm_dp_pd (__m128d __X, __m128d __Y, const int __M)
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpeq_epi64 (__m128i __X, __m128i __Y)
{
return (__m128i) __builtin_ia32_pcmpeqq ((__v2di)__X, (__v2di)__Y);
return (__m128i) ((__v2di)__X == (__v2di)__Y);
}
/* Min/max packed integer instructions. */
......@@ -325,7 +325,7 @@ _mm_max_epu32 (__m128i __X, __m128i __Y)
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mullo_epi32 (__m128i __X, __m128i __Y)
{
return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X, (__v4si)__Y);
return (__m128i) ((__v4su)__X * (__v4su)__Y);
}
/* Packed integer 32-bit multiplication of 2 pairs of operands
......@@ -795,7 +795,7 @@ _mm_cmpestrz (__m128i __X, int __LX, __m128i __Y, int __LY, const int __M)
extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpgt_epi64 (__m128i __X, __m128i __Y)
{
return (__m128i) __builtin_ia32_pcmpgtq ((__v2di)__X, (__v2di)__Y);
return (__m128i) ((__v2di)__X > (__v2di)__Y);
}
#ifdef __DISABLE_SSE4_2__
......
gcc/config/i386/xmmintrin.h
......@@ -180,25 +180,25 @@ _mm_max_ss (__m128 __A, __m128 __B)
extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_add_ps (__m128 __A, __m128 __B)
{
return (__m128) __builtin_ia32_addps ((__v4sf)__A, (__v4sf)__B);
return (__m128) ((__v4sf)__A + (__v4sf)__B);
}
extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_sub_ps (__m128 __A, __m128 __B)
{
return (__m128) __builtin_ia32_subps ((__v4sf)__A, (__v4sf)__B);
return (__m128) ((__v4sf)__A - (__v4sf)__B);
}
extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mul_ps (__m128 __A, __m128 __B)
{
return (__m128) __builtin_ia32_mulps ((__v4sf)__A, (__v4sf)__B);
return (__m128) ((__v4sf)__A * (__v4sf)__B);
}
extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_div_ps (__m128 __A, __m128 __B)
{
return (__m128) __builtin_ia32_divps ((__v4sf)__A, (__v4sf)__B);
return (__m128) ((__v4sf)__A / (__v4sf)__B);
}
extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
......@@ -957,13 +957,13 @@ _mm_setr_ps (float __Z, float __Y, float __X, float __W)
extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_store_ss (float *__P, __m128 __A)
{
*__P = __builtin_ia32_vec_ext_v4sf ((__v4sf)__A, 0);
*__P = ((__v4sf)__A)[0];
}
extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_cvtss_f32 (__m128 __A)
{
return __builtin_ia32_vec_ext_v4sf ((__v4sf)__A, 0);
return ((__v4sf)__A)[0];
}
/* Store four SPFP values. The address must be 16-byte aligned. */
......
gcc/testsuite/ChangeLog
2014-11-15 Marc Glisse <marc.glisse@inria.fr>
* gcc.target/i386/intrinsics_opt-1.c: New testcase.
* gcc.target/i386/intrinsics_opt-2.c: Likewise.
* gcc.target/i386/intrinsics_opt-3.c: Likewise.
* gcc.target/i386/intrinsics_opt-4.c: Likewise.
2014-11-15 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
* gcc.dg/tree-ssa/pr61144.c: Add dg-require-alias.
......
gcc/testsuite/gcc.target/i386/intrinsics_opt-1.c 0 → 100644
/* { dg-do compile } */
/* { dg-options "-O2 -mfma" } */
#include <emmintrin.h>
__m128d myfma(__m128d x, __m128d y, __m128d z){
__m128d m = _mm_mul_pd (x, y);
return _mm_add_pd (m, z);
}
/* { dg-final { scan-assembler "vfmadd" } } */
gcc/testsuite/gcc.target/i386/intrinsics_opt-2.c 0 → 100644
/* { dg-do compile } */
/* { dg-options "-O -ffast-math -msse2 -fdump-tree-optimized" } */
#include <emmintrin.h>
int f(__m128d x){
x = _mm_sub_pd (x, x);
x = _mm_mul_pd (x, x);
double r = 42;
_mm_storeh_pd (&r, x);
int z = r == 0;
return __builtin_constant_p (z) && z;
}
/* { dg-final { scan-tree-dump "return 1;" "optimized" } } */
/* { dg-final { cleanup-tree-dump "optimized" } } */
gcc/testsuite/gcc.target/i386/intrinsics_opt-3.c 0 → 100644
/* { dg-do compile } */
/* { dg-options "-O -msse2" } */
#include <emmintrin.h>
double f(){
__m128d x = _mm_set1_pd (0.);
double r = 42;
_mm_storeh_pd (&r, x);
return r;
}
/* { dg-final { scan-assembler-not "unpckhpd" } } */
gcc/testsuite/gcc.target/i386/intrinsics_opt-4.c 0 → 100644
/* { dg-do compile } */
/* { dg-options "-O -ffast-math -msse2" } */
#include <emmintrin.h>
__m128d f(__m128d x, __m128d y, __m128d z){
y = _mm_add_pd (x, y);
y = _mm_add_pd (z, y);
return _mm_sub_pd (y, x);
}
/* { dg-final { scan-assembler-not "subpd" } } */
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