invoke.texi: Document -mzarch, -mesa, -mcpu= and -march= option for S/390 and zSeries.

       	* doc/invoke.texi: Document -mzarch, -mesa, -mcpu= and -march=
	option for S/390 and zSeries.
        * config/s390/s390.c (s390_cpu, s390_cpu_string, s390_arch,
        s390_arch_string): New variables.
        (override_options): Checking for options and setting of
        appropriate target_flags, cpu and arch flags.
        * config/s390/s390.h: (processor_type): New enum.
        (TARGET_SWITCHES): New switches -mesa/zarch.
        * config/s390/s390.md: New attribute 'cpu'.

From-SVN: r60364

gcc/ChangeLog

+2002-12-20  Hartmut Penner  <hpenner@de.ibm.com>
+	
+       	* doc/invoke.texi: Document -mzarch, -mesa, -mcpu= and -march=
+	option for S/390 and zSeries.
+        * config/s390/s390.c (s390_cpu, s390_cpu_string, s390_arch,
+        s390_arch_string): New variables.
+        (override_options): Checking for options and setting of 
+	appropriate target_flags, cpu and arch flags.
+        * config/s390/s390.h: (processor_type): New enum.
+        (TARGET_SWITCHES): New switches -mesa/zarch.
+        * config/s390/s390.md: New attribute 'cpu'.
+
 2002-12-19  Kazu Hirata  <kazu@cs.umass.edu>
 
 	* c-pretty-print.h: Fix comment typos.

gcc/config/s390/s390.c

@@ -117,6 +117,15 @@ struct s390_address
   int pointer;
 };
 
+/* Which cpu are we scheduling for.  */
+enum processor_type s390_cpu;
+/* Which instruction set architecture to use.  */
+enum processor_type s390_arch;
+
+/* Strings to hold which cpu and instruction set architecture  to use.  */
+const char *s390_cpu_string;		/* for -mcpu=<xxx> */
+const char *s390_arch_string;		/* for -march=<xxx> */
+
 /* Define the structure for the machine field in struct function.  */
 
 struct machine_function GTY(())
@@ -832,11 +841,85 @@ optimization_options (level, size)
 void
 override_options ()
 {
+  int i;
+  static const char * const cpu_names[] = TARGET_CPU_DEFAULT_NAMES;
+  static struct pta
+    {
+      const char *const name;		/* processor name or nickname.  */
+      const enum processor_type processor;
+      const enum pta_flags
+	{
+	  PTA_IEEE_FLOAT = 1,
+	  PTA_ZARCH = 2
+	} flags;
+    }
+  const processor_alias_table[] =
+    {
+      {"g5", PROCESSOR_9672_G5, PTA_IEEE_FLOAT},
+      {"g6", PROCESSOR_9672_G6, PTA_IEEE_FLOAT},
+      {"z900", PROCESSOR_2064_Z900, PTA_IEEE_FLOAT | PTA_ZARCH},
+    };
+
+  int const pta_size = ARRAY_SIZE (processor_alias_table);
+
   /* Acquire a unique set number for our register saves and restores.  */
   s390_sr_alias_set = new_alias_set ();
 
   /* Set up function hooks.  */
   init_machine_status = s390_init_machine_status;
+ 
+  /* Set cpu and arch, if only partially given.  */
+  if (!s390_cpu_string && s390_arch_string)
+    s390_cpu_string = s390_arch_string;
+  if (!s390_cpu_string)
+    s390_cpu_string = cpu_names [TARGET_64BIT ? TARGET_CPU_DEFAULT_2064
+                                              :	TARGET_CPU_DEFAULT_9672];
+  if (!s390_arch_string)
+#ifdef DEFAULT_TARGET_64BIT
+    s390_arch_string = "z900";
+#else
+    s390_arch_string = "g5";
+#endif
+
+  for (i = 0; i < pta_size; i++)
+    if (! strcmp (s390_arch_string, processor_alias_table[i].name))
+      {
+	s390_arch = processor_alias_table[i].processor;
+	/* Default cpu tuning to the architecture.  */
+	s390_cpu = s390_arch;
+     
+	if (!(processor_alias_table[i].flags & PTA_ZARCH) 
+            && TARGET_64BIT)
+          error ("64-bit ABI not supported on %s", s390_arch_string);
+
+	if (!(processor_alias_table[i].flags & PTA_ZARCH) 
+            && TARGET_ZARCH)
+          error ("z/Architecture not supported on %s", s390_arch_string);
+
+	break;
+      }
+
+  if (i == pta_size)
+    error ("bad value (%s) for -march= switch", s390_arch_string);
+
+  /* ESA implies 31 bit mode.  */
+  if ((target_flags_explicit & MASK_ZARCH) && !TARGET_ZARCH)
+    {
+      if ((target_flags_explicit & MASK_64BIT) && TARGET_64BIT)
+	error ("64-bit ABI not possible in ESA/390 mode");
+      else
+	target_flags &= ~MASK_64BIT;
+    }
+
+  for (i = 0; i < pta_size; i++)
+    if (! strcmp (s390_cpu_string, processor_alias_table[i].name))
+      {
+	s390_cpu = processor_alias_table[i].processor;
+	break;
+      }
+
+  if (i == pta_size)
+    error ("bad value (%s) for -mcpu= switch", s390_cpu_string);
 }
 
 /* Map for smallest class containing reg regno.  */

gcc/config/s390/s390.h

@@ -28,6 +28,28 @@ Boston, MA 02111-1307, USA.  */
 #include <s390/fixdfdi.h>
 #endif
 
+/* Which processor to generate code or schedule for. The cpu attribute 
+   defines a list that mirrors this list, so changes to s390.md must be
+   made at the same time.  */
+
+enum processor_type
+{
+  PROCESSOR_9672_G5,		
+  PROCESSOR_9672_G6,		
+  PROCESSOR_2064_Z900,		
+  PROCESSOR_max
+};
+
+extern enum processor_type s390_cpu;
+extern const char *s390_cpu_string;
+
+extern enum processor_type s390_arch;
+extern const char *s390_arch_string;
+
+#define TARGET_CPU_DEFAULT_9672 0
+#define TARGET_CPU_DEFAULT_2064 2
+
+#define TARGET_CPU_DEFAULT_NAMES {"g5", "g6", "z900"}
 
 /* Run-time target specification.  */
 
@@ -46,39 +68,57 @@ Boston, MA 02111-1307, USA.  */
 /* Optional target features.  */
 extern int target_flags;
 
-#define TARGET_HARD_FLOAT          (target_flags & 1)
-#define TARGET_SOFT_FLOAT          (!(target_flags & 1))
-#define TARGET_BACKCHAIN           (target_flags & 2)
-#define TARGET_SMALL_EXEC          (target_flags & 4)
-#define TARGET_DEBUG_ARG           (target_flags & 8)
-#define TARGET_64BIT               (target_flags & 16)
-#define TARGET_MVCLE               (target_flags & 32)
+#define MASK_HARD_FLOAT            0x01
+#define MASK_BACKCHAIN             0x02
+#define MASK_SMALL_EXEC            0x04
+#define MASK_DEBUG_ARG             0x08
+#define MASK_64BIT                 0x10
+#define MASK_ZARCH                 0x20
+#define MASK_MVCLE                 0x40
+
+#define TARGET_HARD_FLOAT          (target_flags & MASK_HARD_FLOAT)
+#define TARGET_SOFT_FLOAT          (!(target_flags & MASK_HARD_FLOAT))
+#define TARGET_BACKCHAIN           (target_flags & MASK_BACKCHAIN)
+#define TARGET_SMALL_EXEC          (target_flags & MASK_SMALL_EXEC)
+#define TARGET_DEBUG_ARG           (target_flags & MASK_DEBUG_ARG)
+#define TARGET_64BIT               (target_flags & MASK_64BIT)
+#define TARGET_ZARCH               (target_flags & MASK_ZARCH)
+#define TARGET_MVCLE               (target_flags & MASK_MVCLE)
 
 /* ??? Once this actually works, it could be made a runtime option.  */
 #define TARGET_IBM_FLOAT           0
 #define TARGET_IEEE_FLOAT          1
 
 #ifdef DEFAULT_TARGET_64BIT
-#define TARGET_DEFAULT             0x13
+#define TARGET_DEFAULT             0x33
 #else
 #define TARGET_DEFAULT             0x3
 #endif
 
-#define TARGET_SWITCHES           		       		       \
-{ { "hard-float",    1, N_("Use hardware fp")},         		       \
-  { "soft-float",   -1, N_("Don't use hardware fp")},	      	       \
-  { "backchain",     2, N_("Set backchain")},           		       \
+#define TARGET_SWITCHES                                                \
+{ { "hard-float",    1, N_("Use hardware fp")},                        \
+  { "soft-float",   -1, N_("Don't use hardware fp")},                  \
+  { "backchain",     2, N_("Set backchain")},                          \
   { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \
-  { "small-exec",    4, N_("Use bras for execucable < 64k")},           \
-  { "no-small-exec",-4, N_("Don't use bras")},            	       \
-  { "debug",         8, N_("Additional debug prints")},        	       \
-  { "no-debug",     -8, N_("Don't print additional debug prints")},     \
-  { "64",           16, N_("64 bit mode")},         	               \
-  { "31",          -16, N_("31 bit mode")},                             \
-  { "mvcle",        32, N_("mvcle use")},         	               \
-  { "no-mvcle",    -32, N_("mvc&ex")},                                  \
+  { "small-exec",    4, N_("Use bras for execucable < 64k")},          \
+  { "no-small-exec",-4, N_("Don't use bras")},                         \
+  { "debug",         8, N_("Additional debug prints")},                \
+  { "no-debug",     -8, N_("Don't print additional debug prints")},    \
+  { "64",           16, N_("64 bit ABI")},                             \
+  { "31",          -16, N_("31 bit ABI")},                             \
+  { "zarch",        32, N_("z/Architecture")},                         \
+  { "esa",         -32, N_("ESA/390 architecture")},                   \
+  { "mvcle",        64, N_("mvcle use")},                              \
+  { "no-mvcle",    -64, N_("mvc&ex")},                                 \
   { "", TARGET_DEFAULT, 0 } }
 
+#define TARGET_OPTIONS                                          \
+{ { "cpu=",             &s390_cpu_string,                       \
+    N_("Schedule code for given CPU")},                         \
+  { "arch=",            &s390_arch_string,                      \
+    N_("Generate code for given CPU")},                         \
+}
+
 /* Target version string.  Overridden by the OS header.  */
 #ifdef DEFAULT_TARGET_64BIT
 #define TARGET_VERSION fprintf (stderr, " (zSeries)");

gcc/config/s390/s390.md

@@ -44,6 +44,11 @@
 ;;   s_operand -- Matches a valid S operand in a RS, SI or SS type instruction.
 ;;
 
+;; Processor type.  This attribute must exactly match the processor_type
+;; enumeration in s390.h.
+
+(define_attr "cpu" "g5,g6,z900"
+  (const (symbol_ref "s390_cpu")))
 
 ;; Define an insn type attribute.  This is used in function unit delay
 ;; computations.

gcc/doc/invoke.texi

@@ -656,9 +656,10 @@ in the following sections.
 
 @emph{S/390 and zSeries Options}
 @gccoptlist{
+-mcpu=@var{cpu-type} -march=@var{cpu-type} @gol
 -mhard-float  -msoft-float  -mbackchain  -mno-backchain @gol
 -msmall-exec  -mno-small-exec  -mmvcle -mno-mvcle @gol
--m64 -m31 -mdebug -mno-debug}
+-m64 -m31 -mdebug -mno-debug -mesa -mzarch}
 
 @emph{CRIS Options}
 @gccoptlist{
@@ -9803,6 +9804,18 @@ particular to generate 64-bit instructions.  For the @samp{s390}
 targets, the default is @option{-m31}, while the @samp{s390x}
 targets default to @option{-m64}.
 
+@item -mzarch
+@itemx -mesa
+@opindex mzarch
+@opindex mesa
+When @option{-mzarch} is specified, generate code using the 
+instructions available on z/Architecture. 
+When @option{-mesa} is specified, generate code using the 
+instructions available on ESA/390. Note that @option{-mesa} is
+not possible with @option{-m64}.
+For the @samp{s390} targets, the default is @option{-mesa}, 
+while the @samp{s390x} targets default to @option{-mzarch}.
+
 @item -mmvcle
 @itemx -mno-mvcle
 @opindex mmvcle
@@ -9818,6 +9831,18 @@ use a @code{mvc} loop instead.  This is the default.
 Print (or do not print) additional debug information when compiling.
 The default is to not print debug information.
 
+@item -march=@var{arch}
+@opindex march
+Generate code that will run on @var{arch}, which is the name of system
+representing a certain processor type. Possible values for
+@var{cpu-type} are @samp{g5}, @samp{g6} and @samp{z900}. 
+
+@item -mcpu=@var{arch}
+@opindex mcpu
+Tune to @var{cpu-type} everything applicable about the generated code,
+ except for the ABI and the set of available instructions. 
+The list of @var{arch} values is the same as for @option{-march}.
+
 @end table
 
 @node CRIS Options