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riscv-gcc-1
Commit 1f960ced by Kyrylo Tkachov Committed by Kyrylo Tkachov
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[AArch64] Implement vfma_f64, vmla_f64, vfms_f64, vmls_f64 intrinsics. 

[gcc/]
	* config/aarch64/arm_neon.h (vfma_f64): New intrinsic.
	(vmla_f64): Likewise.
	(vfms_f64): Likewise.
	(vmls_f64): Likewise.

[testsuite/]
	* gcc.target/aarch64/simd/vfma_f64.c: New test.
	* gcc.target/aarch64/simd/vmla_f64.c: Likewise.
	* gcc.target/aarch64/simd/vfms_f64.c: Likewise.
	* gcc.target/aarch64/simd/vmls_f64.c: Likewise.

From-SVN: r212756
parent 0d894170
Showing with 182 additions and 0 deletions
gcc/ChangeLog
2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/arm_neon.h (vfma_f64): New intrinsic.
(vmla_f64): Likewise.
(vfms_f64): Likewise.
(vmls_f64): Likewise.
2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_frint_unspec_p): New function.
(aarch64_rtx_costs): Handle FIX, UNSIGNED_FIX, UNSPEC.
......
gcc/config/aarch64/arm_neon.h
......@@ -16764,6 +16764,14 @@ vextq_u64 (uint64x2_t __a, uint64x2_t __b, __const int __c)
#endif
}
/* vfma */
__extension__ static __inline float64x1_t __attribute__ ((__always_inline__))
vfma_f64 (float64x1_t __a, float64x1_t __b, float64x1_t __c)
{
return (float64x1_t) {__builtin_fma (__b[0], __c[0], __a[0])};
}
/* vfma_lane */
__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
......@@ -16867,6 +16875,14 @@ vfmaq_laneq_f64 (float64x2_t __a, float64x2_t __b,
__a);
}
/* vfms */
__extension__ static __inline float64x1_t __attribute__ ((__always_inline__))
vfms_f64 (float64x1_t __a, float64x1_t __b, float64x1_t __c)
{
return (float64x1_t) {__builtin_fma (-__b[0], __c[0], __a[0])};
}
/* vfms_lane */
__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
......@@ -18495,6 +18511,12 @@ vmla_f32 (float32x2_t a, float32x2_t b, float32x2_t c)
return a + b * c;
}
__extension__ static __inline float64x1_t __attribute__ ((__always_inline__))
vmla_f64 (float64x1_t __a, float64x1_t __b, float64x1_t __c)
{
return __a + __b * __c;
}
__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
vmlaq_f32 (float32x4_t a, float32x4_t b, float32x4_t c)
{
......@@ -18663,6 +18685,12 @@ vmls_f32 (float32x2_t a, float32x2_t b, float32x2_t c)
return a - b * c;
}
__extension__ static __inline float64x1_t __attribute__ ((__always_inline__))
vmls_f64 (float64x1_t __a, float64x1_t __b, float64x1_t __c)
{
return __a - __b * __c;
}
__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
vmlsq_f32 (float32x4_t a, float32x4_t b, float32x4_t c)
{
......
gcc/testsuite/ChangeLog
2014-07-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/simd/vfma_f64.c: New test.
* gcc.target/aarch64/simd/vmla_f64.c: Likewise.
* gcc.target/aarch64/simd/vfms_f64.c: Likewise.
* gcc.target/aarch64/simd/vmls_f64.c: Likewise.
2014-07-17 Max Ostapenko <m.ostapenko@partner.samsung.com>
* c-c++-common/ubsan/bounds-2.c: Change output pattern.
......
gcc/testsuite/gcc.target/aarch64/simd/vfma_f64.c 0 → 100644
/* Test the vfma_f64 AArch64 SIMD intrinsic. */
/* { dg-do run } */
/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
#define EPS 1.0e-15
extern void abort (void);
int
main (void)
{
float64x1_t arg1;
float64x1_t arg2;
float64x1_t arg3;
float64_t expected;
float64_t actual;
arg1 = vcreate_f64 (0x3fe3955382d35b0eULL);
arg2 = vcreate_f64 (0x3fa88480812d6670ULL);
arg3 = vcreate_f64 (0x3fd5791ae2a92572ULL);
expected = 0.6280448184360076;
actual = vget_lane_f64 (vfma_f64 (arg1, arg2, arg3), 0);
if (__builtin_fabs (expected - actual) > EPS)
abort ();
return 0;
}
/* { dg-final { scan-assembler-times "fmadd\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" 1 } } */
/* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/aarch64/simd/vfms_f64.c 0 → 100644
/* Test the vfms_f64 AArch64 SIMD intrinsic. */
/* { dg-do run } */
/* { dg-options "-save-temps -O3" } */
#include "arm_neon.h"
#define EPS 1.0e-15
extern void abort (void);
int
main (void)
{
float64x1_t arg1;
float64x1_t arg2;
float64x1_t arg3;
float64_t expected;
float64_t actual;
arg1 = vcreate_f64 (0x3fe730af8db9e6f7ULL);
arg2 = vcreate_f64 (0x3fe6b78680fa29ceULL);
arg3 = vcreate_f64 (0x3feea3cbf921fbe0ULL);
expected = 4.4964705746355915e-2;
actual = vget_lane_f64 (vfms_f64 (arg1, arg2, arg3), 0);
if (__builtin_fabs (expected - actual) > EPS)
abort ();
return 0;
}
/* { dg-final { scan-assembler-times "fmsub\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" 1 } } */
/* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/aarch64/simd/vmla_f64.c 0 → 100644
/* Test the vmla_f64 AArch64 SIMD intrinsic. */
/* { dg-do run } */
/* { dg-options "-O3" } */
#include "arm_neon.h"
#define EPS 1.0e-15
extern void abort (void);
int
main (void)
{
float64x1_t arg1;
float64x1_t arg2;
float64x1_t arg3;
float64_t expected;
float64_t actual;
arg1 = vcreate_f64 (0x3fc4de626b6bbe9cULL);
arg2 = vcreate_f64 (0x3fb7e454dbe84408ULL);
arg3 = vcreate_f64 (0x3fdd359b94201a3aULL);
expected = 0.20563116414665633;
actual = vget_lane_f64 (vmla_f64 (arg1, arg2, arg3), 0);
if (__builtin_fabs (expected - actual) > EPS)
abort ();
return 0;
}
gcc/testsuite/gcc.target/aarch64/simd/vmls_f64.c 0 → 100644
/* Test the vmls_f64 AArch64 SIMD intrinsic. */
/* { dg-do run } */
/* { dg-options "-O3" } */
#include "arm_neon.h"
#define EPS 1.0e-15
extern void abort (void);
int
main (void)
{
float64x1_t arg1;
float64x1_t arg2;
float64x1_t arg3;
float64_t expected;
float64_t actual;
arg1 = vcreate_f64 (0x3fea7ec860271ad9ULL);
arg2 = vcreate_f64 (0x3fca04faa09302e8ULL);
arg3 = vcreate_f64 (0x3fecfec8c67415a0ULL);
expected = 0.6437868393361155;
actual = vget_lane_f64 (vmls_f64 (arg1, arg2, arg3), 0);
if (__builtin_fabs (expected - actual) > EPS)
abort ();
return 0;
}
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