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riscv-gcc-1
Commit 1f80ea95 by John David Anglin Committed by Jeff Law
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pa.c (restore_unscaled_index_insn_codes): Delete procedure. 

	* pa.c (restore_unscaled_index_insn_codes): Delete procedure.
	(record_unscaled_index_insn_codes): Likewise.
	(unscaled_index_insn_codes): Delete.
	(max_unscaled_index_insn_codes_uid): Delete.
	(output_function_prologue, output_function_epilogue, pa_reorg):
	Don't use the unscaled index insn hack.

From-SVN: r37865
parent d16ca6a6
Showing with 7 additions and 116 deletions
gcc/ChangeLog
2000-11-29 John David Anglin <dave@hiauly1.hia.nrc.ca>
* pa.c (restore_unscaled_index_insn_codes): Delete procedure.
(record_unscaled_index_insn_codes): Likewise.
(unscaled_index_insn_codes): Delete.
(max_unscaled_index_insn_codes_uid): Delete.
(output_function_prologue, output_function_epilogue, pa_reorg):
Don't use the unscaled index insn hack.
* pa.md: Remove hack from all index insns to reverse the operand
order of frame and stack pointer references incorrectly created
in the reload pass.
......
gcc/config/pa/pa.c
......@@ -43,8 +43,6 @@ Boston, MA 02111-1307, USA. */
#include "recog.h"
#include "tm_p.h"
static void restore_unscaled_index_insn_codes PARAMS ((rtx));
static void record_unscaled_index_insn_codes PARAMS ((rtx));
static void pa_combine_instructions PARAMS ((rtx));
static int pa_can_combine_p PARAMS ((rtx, rtx, rtx, int, rtx, rtx, rtx));
static int forward_branch_p PARAMS ((rtx));
......@@ -100,13 +98,6 @@ struct deferred_plabel
} *deferred_plabels = 0;
int n_deferred_plabels = 0;
/* Array indexed by INSN_UIDs holding the INSN_CODE of an insn which
uses an unscaled indexed address before delay slot scheduling. */
static int *unscaled_index_insn_codes;
/* Upper bound for the array. */
static int max_unscaled_index_insn_codes_uid;
void
override_options ()
{
......@@ -2924,9 +2915,6 @@ output_function_prologue (file, size)
total_code_bytes = -1;
remove_useless_addtr_insns (get_insns (), 0);
/* Restore INSN_CODEs for insn which use unscaled indexed addresses. */
restore_unscaled_index_insn_codes (get_insns ());
}
void
......@@ -3211,11 +3199,6 @@ output_function_epilogue (file, size)
fputs ("\tnop\n", file);
fputs ("\t.EXIT\n\t.PROCEND\n", file);
/* Free up stuff we don't need anymore. */
if (unscaled_index_insn_codes)
free (unscaled_index_insn_codes);
max_unscaled_index_insn_codes_uid = 0;
}
void
......@@ -6346,101 +6329,6 @@ following_call (insn)
return 0;
}
/* Restore any INSN_CODEs for insns with unscaled indexed addresses since
the INSN_CODE might be clobberd by rerecognition triggered by reorg. */
static void
restore_unscaled_index_insn_codes (insns)
rtx insns;
{
rtx insn;
for (insn = insns; insn; insn = NEXT_INSN (insn))
{
if (INSN_UID (insn) < max_unscaled_index_insn_codes_uid
&& unscaled_index_insn_codes[INSN_UID (insn)] != -1)
INSN_CODE (insn) = unscaled_index_insn_codes[INSN_UID (insn)];
}
}
/* Severe braindamage:
On the PA, address computations within MEM expressions are not
commutative because of the implicit space register selection
from the base register (instead of the entire effective address).
Because of this mis-feature we have to know which register in a reg+reg
address is the base and which is the index.
Before reload, the base can be identified by REG_POINTER. We use
this to force base + index addresses to match a different insn than
index + base addresses.
We assume that no pass during or after reload creates new unscaled indexed
addresses, so any unscaled indexed address we find after reload must have
at one time been recognized a base + index or index + base and we accept
any register as a base register.
This scheme assumes that no pass during/after reload will rerecognize an
insn with an unscaled indexed address. This failed due to a reorg call
to rerecognize certain insns.
So, we record if an insn uses an unscaled indexed address and which
register is the base (via recording of the INSN_CODE for such insns).
Just before we output code for the function, we make sure all the insns
using unscaled indexed addresses have the same INSN_CODE as they did
immediately before delay slot scheduling.
This is extremely gross. Long term, I'd like to use REG_POINTER to
handle these kinds of problems.
FIXME: Is this still necessary now that the pointer flag is stored
in REG rtx's and basereg_operand properly checks for the flag after
reload? */
static void
record_unscaled_index_insn_codes (insns)
rtx insns;
{
rtx insn;
max_unscaled_index_insn_codes_uid = get_max_uid ();
unscaled_index_insn_codes
= (int *)xmalloc (max_unscaled_index_insn_codes_uid * sizeof (int));
memset (unscaled_index_insn_codes, -1,
max_unscaled_index_insn_codes_uid * sizeof (int));
for (insn = insns; insn; insn = NEXT_INSN (insn))
{
rtx set = single_set (insn);
rtx mem = NULL_RTX;
/* Ignore anything that isn't a normal SET. */
if (set == NULL_RTX)
continue;
/* No insns can have more than one MEM. */
if (GET_CODE (SET_SRC (set)) == MEM)
mem = SET_SRC (set);
if (GET_CODE (SET_DEST (set)) == MEM)
mem = SET_DEST (set);
/* If neither operand is a mem, then there's nothing to do. */
if (mem == NULL_RTX)
continue;
if (GET_CODE (XEXP (mem, 0)) != PLUS)
continue;
/* If both are REGs (or SUBREGs), then record the insn code for
this insn. */
if (REG_P (XEXP (XEXP (mem, 0), 0)) && REG_P (XEXP (XEXP (mem, 0), 1)))
unscaled_index_insn_codes[INSN_UID (insn)] = INSN_CODE (insn);
}
}
/* We use this hook to perform a PA specific optimization which is difficult
to do in earlier passes.
......@@ -6480,10 +6368,6 @@ pa_reorg (insns)
{
rtx insn;
/* Keep track of which insns have unscaled indexed addresses, and which
register is the base address in such insns. */
record_unscaled_index_insn_codes (insns);
remove_useless_addtr_insns (insns, 1);
if (pa_cpu < PROCESSOR_8000)
......
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