Commit 1f6bc337 by Uros Bizjak

i386.md (enabled): Do not disable fma4 for TARGET_FMA.

	* config/i386/i386.md (enabled): Do not disable fma4 for TARGET_FMA.

From-SVN: r195331
parent 318c94c0
2012-01-21 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (enabled): Do not disable fma4 for TARGET_FMA.
2013-01-20 Vladimir Makarov <vmakarov@redhat.com> 2013-01-20 Vladimir Makarov <vmakarov@redhat.com>
PR target/55433 PR target/55433
* lra-constraints.c (curr_insn_transform): Don't reuse original * lra-constraints.c (curr_insn_transform): Don't reuse original
insn for secondary memory move when memory mode should be insn for secondary memory move when memory mode should be different.
different.
2013-01-20 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> 2013-01-20 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
...@@ -16,7 +19,7 @@ ...@@ -16,7 +19,7 @@
* config/i386/i386.c: Enable CPU_BTVER2 to use btver2 pipeline * config/i386/i386.c: Enable CPU_BTVER2 to use btver2 pipeline
descriptions. descriptions.
* config/i386/i386.md (btver2_decode): New type attributes. * config/i386/i386.md (btver2_decode): New type attributes.
* config/i386/sse.md (btver2_decode, btver2_sse_attr): New * config/i386/sse.md (btver2_decode, btver2_sse_attr): New
type attributes. type attributes.
* config/i386/btver2.md: New file describing btver2 pipelines. * config/i386/btver2.md: New file describing btver2 pipelines.
...@@ -55,8 +58,7 @@ ...@@ -55,8 +58,7 @@
PR middle-end/56015 PR middle-end/56015
* expr.c (expand_expr_real_2) <case COMPLEX_EXPR>: Handle * expr.c (expand_expr_real_2) <case COMPLEX_EXPR>: Handle
the case where writing real complex part of target modifies the case where writing real complex part of target modifies op1.
op1.
2013-01-18 James Greenhalgh <james.greenhalgh@arm.com> 2013-01-18 James Greenhalgh <james.greenhalgh@arm.com>
...@@ -102,8 +104,7 @@ ...@@ -102,8 +104,7 @@
(vt_emit_notes): Create and release the local cache. (vt_emit_notes): Create and release the local cache.
(vt_initialize, vt_finalize): Create and release the global (vt_initialize, vt_finalize): Create and release the global
cache, respectively. cache, respectively.
* alias.c (rtx_equal_for_memref_p): Compare operands of * alias.c (rtx_equal_for_memref_p): Compare operands of ENTRY_VALUEs.
ENTRY_VALUEs.
2013-01-18 Alexandre Oliva <aoliva@redhat.com> 2013-01-18 Alexandre Oliva <aoliva@redhat.com>
......
...@@ -665,14 +665,8 @@ ...@@ -665,14 +665,8 @@
(eq_attr "isa" "avx2") (symbol_ref "TARGET_AVX2") (eq_attr "isa" "avx2") (symbol_ref "TARGET_AVX2")
(eq_attr "isa" "noavx2") (symbol_ref "!TARGET_AVX2") (eq_attr "isa" "noavx2") (symbol_ref "!TARGET_AVX2")
(eq_attr "isa" "bmi2") (symbol_ref "TARGET_BMI2") (eq_attr "isa" "bmi2") (symbol_ref "TARGET_BMI2")
(eq_attr "isa" "fma4") (symbol_ref "TARGET_FMA4")
(eq_attr "isa" "fma") (symbol_ref "TARGET_FMA") (eq_attr "isa" "fma") (symbol_ref "TARGET_FMA")
;; Fma instruction selection has to be done based on
;; register pressure. For generating fma4, a cost model
;; based on register pressure is required. Till then,
;; fma4 instruction is disabled for targets that implement
;; both fma and fma4 instruction sets.
(eq_attr "isa" "fma4")
(symbol_ref "TARGET_FMA4 && !TARGET_FMA")
] ]
(const_int 1))) (const_int 1)))
......
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